ATF1502AS-10AC44 Atmel, ATF1502AS-10AC44 Datasheet - Page 5

• Manufacturer Part Number: ATF1502AS-10AC44
• Description: IC CPLD 32 MACROCELL 10NS 44TQFP
• Manufacturer: Atmel
• Series: ATF1502AS(L)r

Specifications of ATF1502AS-10AC44

• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 10.0ns
• Voltage Supply - Internal: 4.75 V ~ 5.25 V
• Number Of Macrocells: 32
• Number Of I /o: 32
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-TQFP, 44-VQFP
• Voltage: 4.75 V ~ 5.25 V
• Memory Type: EEPROM
• Circuit Type: Electrically Erasable
• Logic Function: Programmable
• Logic Type: CPLD
• Package Type: TQFP-44
• Special Features: Security Fuse
• Temperature, Operating, Range: 0 to +70 °C
• Voltage, Supply: 5.25 V
• For Use With: ATF15XX-DK3 - KIT DEV FOR ATF15XX CPLD'S
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Number Of Logic Elements/cells: -
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device
• Other names: ATF1502AS-10AC

Extra Feedback
I/O Control
Global Bus/Switch
Matrix
Foldback Bus
Programmable
Pin-keeper
Option for
Inputs and I/Os
0995K–PLD–6/05
The clock itself can be either one of the Global CLK signals (GCK[0 : 2]) or an individual prod-
uct term. The flip-flop changes state on the clock’s rising edge. When the GCK signal is used
as the clock, one of the macrocell product terms can be selected as a clock enable. When the
clock enable function is active and the enable signal (product term) is low, all clock edges are
ignored. The flip-flop’s asynchronous reset signal (AR) can be either the Global Clear
(GCLEAR), a product term, or always off. AR can also be a logic OR of GCLEAR with a prod-
uct term. The asynchronous preset (AP) can be a product term or always off.
The ATF1502AS(L) macrocell output can be selected as registered or combinatorial. The
extra buried feedback signal can be either combinatorial or a registered signal regardless of
whether the output is combinatorial or registered. (This enhancement function is automatically
implemented by the fitter software.) Feedback of a buried combinatorial output allows the cre-
ation of a second latch within a macrocell.
The output enable multiplexer (MOE) controls the output enable signal. Each I/O can be indi-
vidually configured as an input, output or for bi-directional operation. The output enable for
each macrocell can be selected from the true or compliment of the two output enable pins, a
subset of the I/O pins, or a subset of the I/O macrocells. This selection is automatically done
by the fitter software when the I/O is configured as an input, all macrocell resources are still
available, including the buried feedback, expander and cascade logic.
The global bus contains all input and I/O pin signals as well as the buried feedback signal from
all 32 macrocells. The switch matrix in each logic block receives as its inputs all signals from
the global bus. Under software control, up to 40 of these signals can be selected as inputs to
the logic block.
Each macrocell also generates a foldback product term. This signal goes to the regional bus
and is available to four macrocells. The foldback is an inverse polarity of one of the macrocell’s
product terms. The four foldback terms in each region allow generation of high fan-in sum
terms (up to nine product terms) with little additional delay.
The ATF1502AS offers the option of programming all input and I/O pins so that pin-keeper cir-
cuits can be utilized. When any pin is driven high or low and then subsequently left floating, it
will stay at that previous high or low level. This circuitry prevents unused input and I/O lines
from floating to intermediate voltage levels, which causes unnecessary power consumption
and system noise. The keeper circuits eliminate the need for external pull-up resistors and
eliminate their DC power consumption.
ATF1502AS(L)
5