XC95288XV-7CS280C Xilinx Inc, XC95288XV-7CS280C Datasheet - Page 2
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XC95288XV-7CS280C
Manufacturer Part Number
XC95288XV-7CS280C
Description
IC CPLD 2.5V ISP 280-CSP
Manufacturer
Xilinx Inc
Series
XC9500XVr
Specifications of XC95288XV-7CS280C
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
2.37 V ~ 2.62 V
Number Of Logic Elements/blocks
16
Number Of Macrocells
288
Number Of Gates
6400
Number Of I /o
192
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
280-CSBGA
Voltage
2.5V
Memory Type
FLASH
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Number Of Logic Elements/cells
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
XC9500XV Family High-Performance CPLD
provides buffering for device inputs and outputs. Each FB
provides programmable logic capability with extra wide 54
inputs and 18 outputs. The Fast CONNECT II switch matrix
connects all FB outputs and input signals to the FB inputs.
Table 1: XC9500XV Device Family
2
Macrocells
Usable Gates
Registers
T
T
PD
SU
JTAG Port
(ns)
(ns)
I/O/GCK
I/O/GSR
I/O/GTS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Note: Function block outputs (indicated by the bold lines) drive the I/O blocks directly.
2 or 4
3
1
3
XC9536XV
Controller
800
3.5
36
36
Blocks
Figure 1: XC9500XV Architecture
JTAG
5
I/O
www.xilinx.com
XC9572XV
For each FB, up to 18 outputs (depending on package
pin-count) and associated output enable signals drive
directly to the IOBs. See
.
1,600
3.5
72
72
5
In-System Programming Controller
18
18
18
18
XC95144XV
3,200
54
54
54
54
144
144
3.5
Figure 1.
5
DS049 (v3.0) June 25, 2007
Product Specification
Macrocells
Macrocells
Macrocells
Macrocells
Function
Function
Function
Function
Block N
Block 1
Block 2
Block 3
1 to 18
1 to 18
1 to 18
1 to 18
XC95288XV
DS049_01_041400
6,400
288
288
6
4
R