DSPB56362AG120 Freescale Semiconductor, DSPB56362AG120 Datasheet - Page 3

• Manufacturer Part Number: DSPB56362AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56362AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (126 kB)
• On-chip Ram: 42kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Architecture: Modified Harvard
• Format: Fixed Point
• Clock Freq (max): 120MHz
• Mips: 120
• Device Input Clock Speed: 120MHz
• Ram Size: 42KB
• Program Memory Size: 90KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Instruction Set Architecture: Modified Harvard
• Device Million Instructions Per Second: 120 MIPS
• Maximum Clock Frequency: 120 MHz
• Program Memory Type: Flash
• Data Ram Size: 42 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SPI, I2C, ESAI, SHI
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Freescale Semiconductor
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Multimode, multichannel decoder software functionality
— Dolby Digital and Pro Logic
— MPEG2 5.1
— DTS
— Bass management
Digital audio post-processing capabilities
— 3D Virtual surround sound
— Lucasfilm THX5.1
— Soundfield processing
— Equalization
Digital Signal Processing Core
— 100 MIPS with a 100 MHz clock at 3.3 V +/- 5%
— Object code compatible with the DSP56000 core
— Highly parallel instruction set
— Data arithmetic logic unit (ALU)
— Program control unit (PCU)
— Direct memory access (DMA)
— Phase-locked loop (PLL)
— Hardware debugging support
Features
– Fully pipelined 24 x 24-bit parallel multiplier-accumulator (MAC)
– 56-bit parallel barrel shifter (fast shift and normalization; bit stream generation and parsing)
– Conditional ALU instructions
– 24-bit or 16-bit arithmetic support under software control
– Position independent code (PIC) support
– Addressing modes optimized for DSP applications (including immediate offsets)
– On-chip instruction cache controller
– On-chip memory-expandable hardware stack
– Nested hardware DO loops
– Fast auto-return interrupts
– Six DMA channels supporting internal and external accesses
– One-, two-, and three- dimensional transfers (including circular buffering)
– End-of-block-transfer interrupts
– Triggering from interrupt lines and all peripherals
– Software programmable PLL-based frequency synthesizer for the core clock
– Allows change of low-power divide factor (DF) without loss of lock
– Output clock with skew elimination
DSP56362 Technical Data, Rev. 4
Overview
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