DSP56303AG100 Freescale Semiconductor, DSP56303AG100 Datasheet - Page 18

• Manufacturer Part Number: DSP56303AG100
• Description: IC DSP 24BIT 100MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of DSP56303AG100

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Package: 144LQFP
• Maximum Speed: 100 MHz
• Ram Size: 24 KB
• Device Million Instructions Per Second: 100 MIPS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Signals/Connections
1.10 Serial Communication Interface (SCI)
The SCI provides a full duplex port for serial communication with other DSPs, microprocessors, or peripherals
such as modems.
1-14
RXD
PE0
TXD
PE1
SCLK
PE2
Notes:
Signal Name
1.
2.
3.
In the Stop state, the signal maintains the last state as follows:
• If the last state is input, the signal is an ignored input.
• If the last state is output, the signal is tri-stated.
The Wait processing state does not affect the signal state.
All inputs are 5 V tolerant.
Input
Input or Output
Output
Input or Output
Input/Output
Input or Output
Type
Table 1-14.
State During
Ignored Input
Ignored Input
Ignored Input
Reset
DSP56303 Technical Data, Rev. 11
1,2
Serial Communication Interface
Serial Receive Data—Receives byte-oriented serial data and transfers it to the
SCI Receive Shift Register.
Port E 0—The default configuration following reset is GPIO input PE0. When
configured as PE0, signal direction is controlled through the Port E Direction
Register. The signal can be configured as an SCI signal RXD through the Port E
Control Register.
Serial Transmit Data—Transmits data from the SCI Transmit Data Register.
Port E 1—The default configuration following reset is GPIO input PE1. When
configured as PE1, signal direction is controlled through the Port E Direction
Register. The signal can be configured as an SCI signal TXD through the Port E
Control Register.
Serial Clock—Provides the input or output clock used by the transmitter and/or
the receiver.
Port E 2—The default configuration following reset is GPIO input PE2. When
configured as PE2, signal direction is controlled through the Port E Direction
Register. The signal can be configured as an SCI signal SCLK through the Port
E Control Register.
Signal Description
Freescale Semiconductor