ADSP-2191MKST-160 Analog Devices Inc, ADSP-2191MKST-160 Datasheet - Page 19

• Manufacturer Part Number: ADSP-2191MKST-160
• Description: IC DSP CONTROLLER 16BIT 144LQFP
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr
• Type: Fixed Pointr

Specifications of ADSP-2191MKST-160

• Rohs Status: RoHS non-compliant
• Interface: Host Interface, SPI, SSP, UART
• Clock Rate: 160MHz
• Non-volatile Memory: External
• On-chip Ram: 160kB
• Voltage - I/o: 3.00V, 3.30V
• Voltage - Core: 2.50V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 16b
• Clock Freq (max): 160MHz
• Mips: 160
• Device Input Clock Speed: 160MHz
• Ram Size: 160KB
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (min): 2.37/2.97V
• Operating Supply Voltage (max): 2.63/3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / Rohs Status: Not Compliant

ABSOLUTE MAXIMUM RATINGS
1
ESD SENSITIVITY
CAUTION
Power Dissipation
Using the operation-versus-current information in
input current for a specific application, according to the formula for I
supply current and total supply current,
Table 8. Operation Types Versus Input Current
1
2
3
4
5
6
7
REV. A
V
V
V
V
T
T
Stresses greater than those listed above may cause permanent damage to the
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V
readily accumulate on the human body and test equipment and can discharge without
detection. Although the ADSP-2191M features proprietary ESD protection circuitry,
permanent damage may occur on devices subjected to high energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid perfor-
mance degradation or loss of functionality.
Activity
Power Down
Idle 1
Idle 2
Typical
Peak
Test conditions: V
Test conditions: V
PLL, Core, peripheral clocks, and CLKIN are disabled.
PLL is enabled and Core and peripheral clocks are disabled.
Core CLK is disabled and peripheral clock is enabled.
All instructions execute from internal memory. 50% of the instructions are repeat MACs with dual operand addressing, with changing data fetched using
All instructions execute from internal memory. 100% of the instructions are MACs with dual operand addressing, with changing data fetched using a linear
device. These are stress ratings only; functional operation of the device at these
or any other conditions greater than those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
a linear address sequence. 50% of the instructions are type 3 instructions.
address sequence.
DDINT
DDEXT
IL
OL
STORE
LEAD
–V
–V
7
4
5
IH
OH
Lead Temperature of ST-144 (5 seconds) . . . . 185ºC
Internal (Core) Supply Voltage
6
Storage Temperature Range . . . . . .–65ºC to +150ºC
External (I/O) Supply Voltage . . . . –0.3 V to +4.6 V
Input Voltage . . . . . . . . . . –0.5 V to V
Output Voltage Swing. . . –0.5 V to V
I
DDINT
3
DDINT
DDINT
=
= 2.50 V; HCLK (peripheral clock) frequency = CCLK/2 (core clock/2) frequency; T
= 2.65 V; HCLK (peripheral clock) frequency = CCLK/2 (core clock/2) frequency; T
(
%Typical
Typ
100 µA
1
1
184
215
1
×
I
Core
I
DDINT
DDINT-TYPICAL
see Power Dissipation on Page 40.
Max
600 µA
2
2
210
240
1
(mA) CCLK = 160 MHz
. . . –0.3 V to +3.0 V
2
K-Grade
Table
DDEXT
DDEXT
)
Typ
0
5
60
60
60
+
8, designers can estimate the ADSP-2191M’s internal power supply (V
(
1
%Idle
+0.5 V
+0.5 V
Peripheral
–19–
×
I
Max
50 µA
8
70
70
70
DDINT-IDLE
DDINT
2
calculation beneath
)
+
Typ
100 µA
1
1
165
195
(
%Power Down
1
I
Core
DDINT
Max
500 µA
2
2
185
210
Table
(mA)
AMB
AMB
2
×
B-Grade
I
= 25ºC.
= 25ºC.
DDINT-PWRDWN
8. For calculation of external
1
CCLK = 140 MHz
ADSP-2191M
Typ
0
4
55
55
55
1
Peripheral
)
Max
50 µA
7
62
62
62
2
DDINT
)