EP3C5U256I7N Altera, EP3C5U256I7N Datasheet - Page 63
EP3C5U256I7N
Manufacturer Part Number
EP3C5U256I7N
Description
IC CYCLONE III FPGA 5K 256 UBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C5U256I7N.pdf
(274 pages)
Specifications of EP3C5U256I7N
Number Of Logic Elements/cells
5136
Number Of Labs/clbs
321
Total Ram Bits
423936
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-UBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
5136
# I/os (max)
182
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
5136
Ram Bits
423936
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
UFBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2560
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C5U256I7N
Manufacturer:
ALTERA21
Quantity:
201
Part Number:
EP3C5U256I7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
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Chapter 4: Embedded Multipliers in the Cyclone III Device Family
Operational Modes
9-Bit Multipliers
Figure 4–4. 9-Bit Multiplier Mode
© December 2009
Data A 0 [8..0]
Data A 1 [8..0]
Data B 0 [8..0]
Data B 1 [8..0]
Altera Corporation
You can configure each embedded multiplier to support two 9 × 9 independent
multipliers for input widths of up to 9 bits.
Figure 4–4
multipliers.
All 9-bit multiplier inputs and results are independently sent through registers. The
multiplier inputs can accept signed integers, unsigned integers, or a combination of
both. Two 9 × 9 multipliers in the same embedded multiplier block share the same
signa and signb signal. Therefore, all the Data A inputs feeding the same
embedded multiplier must have the same sign representation. Similarly, all the
Data B inputs feeding the same embedded multiplier must have the same sign
representation.
shows the embedded multiplier configured to support two 9-bit
ENA
ENA
ENA
ENA
D
D
D
D
CLRN
CLRN
CLRN
CLRN
signa
signb
clock
Q
Q
Q
Q
ena
aclr
Embedded Multiplier
ENA
ENA
D
D
9 × 9 Multiplier
9 × 9 Multiplier
CLRN
CLRN
Q
Q
Cyclone III Device Handbook, Volume 1
Data Out 0 [17..0]
Data Out 1 [17..0]
4–7
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