EP20K30ETC144-3 Altera, EP20K30ETC144-3 Datasheet - Page 23
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EP20K30ETC144-3
Manufacturer Part Number
EP20K30ETC144-3
Description
IC APEX 20KE FPGA 30K 144-TQFP
Manufacturer
Altera
Series
APEX-20K®r
Datasheet
1.EP20K30ETC144-3.pdf
(117 pages)
Specifications of EP20K30ETC144-3
Number Of Logic Elements/cells
1200
Number Of Labs/clbs
120
Total Ram Bits
24576
Number Of I /o
92
Number Of Gates
113000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1865
EP20K30ETC144-3
EP20K30ETC144-3
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP20K30ETC144-3
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP20K30ETC144-3N
Manufacturer:
ALTERA
Quantity:
108
Company:
Part Number:
EP20K30ETC144-3N
Manufacturer:
ALTERA
Quantity:
22
Altera Corporation
Figure 11
how these forms of interconnects and LEs drive each other.
Figure 11. Driving the FastTrack Interconnect
APEX 20KE devices include an enhanced interconnect structure for faster
routing of input signals with high fan-out. Column I/O pins can drive the
FastRow
interconnect without having to drive through the MegaLAB interconnect.
FastRow lines traverse two MegaLAB structures. Also, these pins can
drive the local interconnect directly for fast setup times. On EP20K300E
and larger devices, the FastRow interconnect drives the two MegaLABs in
the top left corner, the two MegaLABs in the top right corner, the two
MegaLABS in the bottom left corner, and the two MegaLABs in the
bottom right corner. On EP20K200E and smaller devices, FastRow
interconnect drives the two MegaLABs on the top and the two MegaLABs
on the bottom of the device. On all devices, the FastRow interconnect
drives all local interconnect in the appropriate MegaLABs except the local
interconnect on the side of the MegaLAB opposite the ESB. Pins using the
FastRow interconnect achieve a faster set-up time, as the signal does not
need to use a MegaLAB interconnect line to reach the destination LE.
Figure 12
™
shows the intersection of a row and column interconnect, and
shows the FastRow interconnect.
interconnect, which routes signals directly into the local
MegaLAB Interconnect
Row Interconnect
APEX 20K Programmable Logic Device Family Data Sheet
Interconnect
Local
LE
Column
Interconnect
23