EP20K30ETC144-3 Altera, EP20K30ETC144-3 Datasheet - Page 31
![IC APEX 20KE FPGA 30K 144-TQFP](/photos/6/70/67061/544-144-tqfp_sml.jpg)
EP20K30ETC144-3
Manufacturer Part Number
EP20K30ETC144-3
Description
IC APEX 20KE FPGA 30K 144-TQFP
Manufacturer
Altera
Series
APEX-20K®r
Datasheet
1.EP20K30ETC144-3.pdf
(117 pages)
Specifications of EP20K30ETC144-3
Number Of Logic Elements/cells
1200
Number Of Labs/clbs
120
Total Ram Bits
24576
Number Of I /o
92
Number Of Gates
113000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1865
EP20K30ETC144-3
EP20K30ETC144-3
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP20K30ETC144-3
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP20K30ETC144-3N
Manufacturer:
ALTERA
Quantity:
108
Company:
Part Number:
EP20K30ETC144-3N
Manufacturer:
ALTERA
Quantity:
22
Altera Corporation
Figure 18. Deep Memory Block Implemented with Multiple ESBs
The ESB implements two forms of dual-port memory: read/write clock
mode and input/output clock mode. The ESB can also be used for
bidirectional, dual-port memory applications in which two ports read or
write simultaneously. To implement this type of dual-port memory, two
or four ESBs are used to support two simultaneous reads or writes. This
functionality is shown in
Figure 19. APEX 20K ESB Implementing Dual-Port RAM
Clock A
APEX 20K Programmable Logic Device Family Data Sheet
ESB
ESB
ESB
Address Decoder
address_a[]
data_a[]
we_a
clkena_a
Figure
Port A
19.
address_b[]
clkena_b
Port B
data_b[]
we_b
to System Logic
Clock B
31