EP2C50F484C6 Altera, EP2C50F484C6 Datasheet - Page 18
![IC CYCLONE II FPGA 50K 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP2C50F484C6
Manufacturer Part Number
EP2C50F484C6
Description
IC CYCLONE II FPGA 50K 484-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C50F484C6
Number Of Logic Elements/cells
50528
Number Of Labs/clbs
3158
Total Ram Bits
594432
Number Of I /o
294
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-2116
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2C50F484C6
Manufacturer:
ALTERA30
Quantity:
306
Company:
Part Number:
EP2C50F484C6N
Manufacturer:
ALTERA
Quantity:
9
Logic Elements
Figure 2–4. LE in Arithmetic Mode
2–6
Cyclone II Device Handbook, Volume 1
of previous LE)
cin (from cout
data1
data2
The Quartus II Compiler automatically creates carry chain logic during
design processing, or you can create it manually during design entry.
Parameterized functions such as LPM functions automatically take
advantage of carry chains for the appropriate functions.
The Quartus II Compiler creates carry chains longer than 16 LEs by
automatically linking LABs in the same column. For enhanced fitting, a
long carry chain runs vertically, which allows fast horizontal connections
to M4K memory blocks or embedded multipliers through direct link
interconnects. For example, if a design has a long carry chain in a LAB
column next to a column of M4K memory blocks, any LE output can feed
an adjacent M4K memory block through the direct link interconnect.
Whereas if the carry chains ran horizontally, any LAB not next to the
column of M4K memory blocks would use other row or column
interconnects to drive a M4K memory block. A carry chain continues as
far as a full column.
Three-Input
Three-Input
LUT
LUT
Register chain
connection
cout
clock (LAB Wide)
(LAB Wide)
ena (LAB Wide)
aclr (LAB Wide)
sload
(LAB Wide)
sclear
Register Feedback
ENA
D
CLRN
Q
Altera Corporation
February 2007
Row, column, and
direct link routing
Row, column, and
direct link routing
Local routing
Register
chain output