EP3C10E144C8N Altera, EP3C10E144C8N Datasheet - Page 98
EP3C10E144C8N
Manufacturer Part Number
EP3C10E144C8N
Description
IC CYCLONE III FPGA 10K 144-EQFP
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C10E144C8N.pdf
(274 pages)
Specifications of EP3C10E144C8N
Number Of Logic Elements/cells
10320
Number Of Labs/clbs
645
Total Ram Bits
423936
Number Of I /o
94
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-EQFP
Family Name
Cyclone III
Number Of Logic Blocks/elements
10320
# I/os (max)
94
Frequency (max)
402MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
10320
Ram Bits
423936
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
EQFP
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2427
EP3C10E144C8N
EP3C10E144C8N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C10E144C8N
Manufacturer:
ALTERA47
Quantity:
516
Part Number:
EP3C10E144C8N
Manufacturer:
ALTERA
Quantity:
20 000
5–34
Table 5–11. Chapter Revision History (Part 2 of 2)
Cyclone III Device Handbook, Volume 1
July 2007
March 2007
Date
Version
1.1
1.0
Updated document with EP3C120 information.
■
■
■
■
■
■
■
Initial release.
Updated Table 5–1 and Table 5–4 with EP3C120 information.
Updated “Clock Control Block” section.
Updated locked signal information in “PLL Control Signals” section and added
Figure 5–16.
Updated “Manual Override” section, updated “Manual Clock Switchover”
section.
Added new “Programmable Bandwidth” section with Figure 5–21 and
Figure 5–22.
Replaced Figure 5-30 with correct diagram.
Added chapter TOC and “Referenced Documents” section.
Chapter 5: Clock Networks and PLLs in the Cyclone III Device Family
Changes Made
© December 2009 Altera Corporation
Chapter Revision History