EP1S25F780C7N Altera, EP1S25F780C7N Datasheet - Page 261

IC STRATIX FPGA 25K LE 780-FBGA

EP1S25F780C7N

Manufacturer Part Number
EP1S25F780C7N
Description
IC STRATIX FPGA 25K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S25F780C7N

Number Of Logic Elements/cells
25660
Number Of Labs/clbs
2566
Total Ram Bits
1944576
Number Of I /o
597
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
25660
# I/os (max)
597
Frequency (max)
420.17MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
25660
Ram Bits
1944576
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1860
EP1S25F780C7N

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S25F780C7N
Manufacturer:
ALTERA
Quantity:
648
Part Number:
EP1S25F780C7N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1S25F780C7N
Manufacturer:
ALTERA
0
Part Number:
EP1S25F780C7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Notes to
(1)
(2)
t
t
DUTY
LOCK
Table 4–125. High-Speed I/O Specifications for Flip-Chip Packages (Part 4 of 4)
Symbol
When J = 4, 7, 8, and 10, the SERDES block is used.
When J = 2 or J = 1, the SERDES is bypassed.
Table
4–125:
LVDS (J = 2
through 10)
LVDS (J =1)
and LVPECL,
PCML,
HyperTransport
technology
All
Conditions
47.5
Min
45
-5 Speed Grade
Typ
50
50
Max
52.5
100
55
47.5
Min
45
-6 Speed Grade
Typ
50
50
Max
52.5
100
55
Notes
47.5
Min
45
(1),
-7 Speed Grade
(2)
Typ
50
50
Max
52.5
100
55
47.5
Min
45
-8 Speed Grade
Typ
50
50
Max
52.5
100
55
Unit
μs
%
%

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