EP3C25F324C8N Altera, EP3C25F324C8N Datasheet - Page 10

• Manufacturer Part Number: EP3C25F324C8N
• Description: IC CYCLONE III FPGA 25K 324-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIIr

Specifications of EP3C25F324C8N

• Number Of Logic Elements/cells: 24624
• Number Of Labs/clbs: 1539
• Total Ram Bits: 608256
• Number Of I /o: 215
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 324-FBGA
• Family Name: Cyclone III
• Number Of Logic Blocks/elements: 24624
• # I/os (max): 215
• Frequency (max): 402MHz
• Process Technology: 65nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 24624
• Ram Bits: 608256
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 324
• Package Type: FBGA
• For Use With: 544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.544-2370 - KIT STARTER CYCLONE III EP3C25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-2078; EP3C25F324C8NES

1–10
Table 1–10. Cyclone III Devices Internal Weak Pull-Up and Weak Pull-Down Resistor
Cyclone III Device Handbook, Volume 2
R
R
Notes to
(1) All I/O pins have an option to enable weak pull-up except configuration, test, and JTAG pin. Weak pull-down feature is only available for JTAG
(2) Pin pull-up resistance values may be lower if an external source drives the pin higher than V
(3) R
(4) R
_P U
_P D
Symbol
TCK.
Minimum condition: –40°C; V
Typical condition: 25°C; V
Maximum condition: 125°C; V
Minimum condition: –40°C; V
Typical condition: 25°C; V
Maximum condition: 125°C; V
_P U
_P D
Table
= (V
= V
I
/I
CCIO
R_PD
Value of I/O pin pull-up resistor before
and during configuration, as well as
user mode if the programmable
pull-up resistor option is enabled
Value of I/O pin pull-down resistor
before and during configuration
1–10:
– V
I
)/I
R_PU
Internal Weak Pull-Up and Weak Pull-Down Resistor
Table 1–10
devices.
Hot Socketing
Table 1–11
Table 1–11. Cyclone III Devices Hot-Socketing Specifications
Schmitt Trigger Input
Cyclone III devices support Schmitt trigger input on TDI, TMS, TCK, nSTATUS,
nCONFIG, nCE, CONF_DONE, and DCLK pins. A Schmitt trigger feature introduces
hysteresis to the input signal for improved noise immunity, especially for signal with
slow edge rate.
range for Schmitt trigger inputs in Cyclone III devices.
I
I
Note to
(1) The I/O ramp rate is 10 ns or more. For ramp rates faster than 10 ns, |IIOPIN| = C
IOPIN(DC )
IOPIN(A C)
CC IO
CC IO
Parameter
dv/dt, in which C is I/O pin capacitance and dv/dt is the slew rate.
CC IO
= V
CC IO
= V
CCIO
CCIO
Symbol
Table
C C
C C
= V
= V
= V
= V
, V
, V
C C
C C
I
CC
I
CC
lists the hot-socketing specifications for Cyclone III devices.
lists the weak pull-up and pull-down resistor values for Cyclone III
= 0 V;
= V
1–11:
+ 5%, V
+ 5%, V
– 5% , V
– 5% , V
CC
Table 1–12
– 5% ;
I
I
I
I
= V
= 50 mV;
= 0 V; in which V
= V
DC current per I/O pin
AC current per I/O pin
CC
C C
+ 5% – 50 mV;
– 5% ; in which V
Parameter
V
V
V
V
V
V
V
V
V
V
V
lists the hysteresis specifications across supported V
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
CC IO
= 3.3 V ± 5% (2),
= 3.0 V ± 5% (2),
= 2.5 V ± 5% (2),
= 1.8 V ± 5% (2),
= 1.5 V ± 5% (2),
= 1.2 V ± 5% (2),
= 3.3 V ± 5%
= 3.0 V ± 5%
= 2.5 V ± 5%
= 1.8 V ± 5%
= 1.5 V ± 5%
I
refers to the input voltage at the I/O pin.
I
Conditions
refers to the input voltage at the I/O pin.
(4)
(4)
(4)
(4)
(4)
(3)
(3)
(3)
(3)
(3)
(3)
Maximum
8 mA
CCIO
300 μA
.
(1)
(Note 1)
Chapter 1: Cyclone III Device Data Sheet
Min
10
13
19
7
7
8
6
6
6
7
8
© January 2010 Altera Corporation
Typ
143
25
28
35
57
82
19
22
25
35
50
Electrical Characteristics
Max
108
163
351
112
41
47
61
30
36
43
71
CCIO
Unit
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ
kΩ