EP1K50QI208-2 Altera, EP1K50QI208-2 Datasheet - Page 38
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EP1K50QI208-2
Manufacturer Part Number
EP1K50QI208-2
Description
IC ACEX 1K FPGA 50K 208-PQFP
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet
1.EP1K10TC100-3N.pdf
(86 pages)
Specifications of EP1K50QI208-2
Number Of Logic Elements/cells
2880
Number Of Labs/clbs
360
Total Ram Bits
40960
Number Of I /o
147
Number Of Gates
199000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Family Name
ACEX™ 1K
Number Of Usable Gates
50000
Number Of Logic Blocks/elements
2880
# I/os (max)
147
Frequency (max)
200MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
2880
Ram Bits
40960
Device System Gates
199000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1010
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1K50QI208-2
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP1K50QI208-2N
Manufacturer:
ALTERA21
Quantity:
53
ACEX 1K Programmable Logic Device Family Data Sheet
38
t
t
t
f
f
f
t
t
t
t
R
F
INDUTY
CLK1
CLK2
CLKDEV
INCLKSTB
LOCK
JITTER
OUTDUTY
Table 11. ClockLock & ClockBoost Parameters for -1 Speed-Grade Devices
Symbol
Input rise time
Input fall time
Input duty cycle
Input clock frequency (ClockBoost clock
multiplication factor equals 1)
Input clock frequency (ClockBoost clock
multiplication factor equals 2)
Input deviation from user specification in the
Altera software
Input clock stability (measured between
adjacent clocks)
Time required for ClockLock or ClockBoost
to acquire lock
Jitter on ClockLock or ClockBoost-
generated clock
Duty cycle for ClockLock or ClockBoost-
generated clock
(3)
(1)
Parameter
(4)
Tables 11
for -1 and -2 speed-grade devices, respectively.
and
12
summarize the ClockLock and ClockBoost parameters
t
t
INCLKSTB
INCLKSTB
Condition
<100
< 50
Min
40
25
16
40
Typ
50
Altera Corporation
250
200
25,000
Max
180
100
(2)
60
90
10
60
5
5
(4)
(4)
PPM
MHz
MHz
Unit
ns
ns
ps
ps
ps
%
%
s