EP1K100FI256-2N Altera, EP1K100FI256-2N Datasheet - Page 49
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EP1K100FI256-2N
Manufacturer Part Number
EP1K100FI256-2N
Description
IC ACEX 1K FPGA 100K 256-FBGA
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet
1.EP1K10TC100-3N.pdf
(86 pages)
Specifications of EP1K100FI256-2N
Number Of Logic Elements/cells
4992
Number Of Labs/clbs
624
Total Ram Bits
49152
Number Of I /o
186
Number Of Gates
257000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
256-FBGA
Family Name
ACEX™ 1K
Number Of Usable Gates
100000
Number Of Logic Blocks/elements
4992
# I/os (max)
186
Frequency (max)
250MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
4992
Ram Bits
49152
Device System Gates
257000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1K100FI256-2N
Manufacturer:
ALTERA
Quantity:
22
Company:
Part Number:
EP1K100FI256-2N
Manufacturer:
ALTERA
Quantity:
5 510
Part Number:
EP1K100FI256-2N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
Figure 22
satisfy 3.3-V PCI compliance.
Figure 22. Relationship between V
Figure 23
devices with 3.3-V and 2.5-V V
3.3-V PCI Local Bus Specification, Revision 2.2 (when VCCIO pins are
connected to 3.3 V). ACEX 1K devices with a -1 speed grade also comply
with the drive strength requirements of the PCI Local Bus Specification,
Revision 2.2 (when VCCINT pins are powered with a minimum supply of
2.375 V, and VCCIO pins are connected to 3.3 V). Therefore, these devices
can be used in open 5.0-V PCI systems.
V
CCINT
II
(V)
shows the required relationship between V
shows the typical output drive characteristics of ACEX 1K
2.7
2.5
2.3
ACEX 1K Programmable Logic Device Family Data Sheet
3.0
3.1
CCIO
PCI-Compliant Region
CCIO
. The output driver is compliant to the
& V
CCINT
V
CCIO
3.3
IO
for 3.3-V PCI Compliance
(V)
CCIO
and V
3.6
CCINT
to
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