EP1K100FI256-2N Altera, EP1K100FI256-2N Datasheet - Page 51
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EP1K100FI256-2N
Manufacturer Part Number
EP1K100FI256-2N
Description
IC ACEX 1K FPGA 100K 256-FBGA
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet
1.EP1K10TC100-3N.pdf
(86 pages)
Specifications of EP1K100FI256-2N
Number Of Logic Elements/cells
4992
Number Of Labs/clbs
624
Total Ram Bits
49152
Number Of I /o
186
Number Of Gates
257000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
256-FBGA
Family Name
ACEX™ 1K
Number Of Usable Gates
100000
Number Of Logic Blocks/elements
4992
# I/os (max)
186
Frequency (max)
250MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
4992
Ram Bits
49152
Device System Gates
257000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1K100FI256-2N
Manufacturer:
ALTERA
Quantity:
22
Company:
Part Number:
EP1K100FI256-2N
Manufacturer:
ALTERA
Quantity:
5 510
Part Number:
EP1K100FI256-2N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
Figure 24. ACEX 1K Device Timing Model
Figure 25. ACEX 1K Device LE Timing Model
Clock/Input
Dedicated
Control-In
Data-In
Carry-In
Figure 24
to and from the various elements of the ACEX 1K device.
Figures 25
and functions within the LE, IOE, EAB, and bidirectional timing models.
Packed Register
Register Control
Carry Chain
t
t
t
t
t
t
t
t
t
LUT Delay
PACKED
LUT
RLUT
CLUT
C
EN
CGEN
CGENR
CICO
shows the overall timing model, which maps the possible paths
Delay
Delay
Delay
through
t
Element
Cascade-In
LABCARRY
Carry-Out
Logic
ACEX 1K Programmable Logic Device Family Data Sheet
28
show the delays that correspond to various paths
Interconnect
Cascade-Out
t
LABCASC
t
CASC
Embedded Array
Block
Register
Delays
t
t
t
t
t
t
COMB
H
PRE
CLR
CO
SU
Data-Out
I/O Element
51
13