EPF10K100ABC356-3 Altera, EPF10K100ABC356-3 Datasheet - Page 18
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EPF10K100ABC356-3
Manufacturer Part Number
EPF10K100ABC356-3
Description
IC FLEX 10KA FPGA 100K 356-BGA
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet
1.EPF10K10ATC100-3.pdf
(128 pages)
Specifications of EPF10K100ABC356-3
Number Of Logic Elements/cells
624
Number Of Labs/clbs
624
Total Ram Bits
24576
Number Of I /o
274
Number Of Gates
158000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
356-BGA
Family Name
FLEX 10KA
Number Of Usable Gates
100000
Number Of Logic Blocks/elements
4992
# Registers
1218
# I/os (max)
274
Frequency (max)
125MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
3.3V
Logic Cells
4992
Ram Bits
24567
Device System Gates
158000
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
356
Package Type
BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-2191
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF10K100ABC356-3
Manufacturer:
ALTERA
Quantity:
36
Company:
Part Number:
EPF10K100ABC356-3
Manufacturer:
MAXIM
Quantity:
304
Company:
Part Number:
EPF10K100ABC356-3N
Manufacturer:
ALTERA
Quantity:
1 259
18
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
LE Operating Modes
The FLEX 10K LE can operate in the following four modes:
Each of these modes uses LE resources differently. In each mode, seven
available inputs to the LE—the four data inputs from the LAB local
interconnect, the feedback from the programmable register, and the
carry-in and cascade-in from the previous LE—are directed to different
destinations to implement the desired logic function. Three inputs to the
LE provide clock, clear, and preset control for the register. The Altera
software, in conjunction with parameterized functions such as LPM and
DesignWare functions, automatically chooses the appropriate mode for
common functions such as counters, adders, and multipliers. If required,
the designer can also create special-purpose functions which use a specific
LE operating mode for optimal performance.
The architecture provides a synchronous clock enable to the register in all
four modes. The Altera software can set DATA1 to enable the register
synchronously, providing easy implementation of fully synchronous
designs.
Figure 9
Normal mode
Arithmetic mode
Up/down counter mode
Clearable counter mode
shows the LE operating modes.
Altera Corporation