EP2S15F672I4N Altera, EP2S15F672I4N Datasheet - Page 36
EP2S15F672I4N
Manufacturer Part Number
EP2S15F672I4N
Description
IC STRATIX II FPGA 15K 672-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S15F672I4N
Number Of Logic Elements/cells
15600
Number Of Labs/clbs
780
Total Ram Bits
419328
Number Of I /o
366
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
672-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2S15F672I4N
Manufacturer:
ALTERA
Quantity:
220
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TriMatrix Memory
TriMatrix
Memory
2–28
Stratix II Device Handbook, Volume 1
Column IOE
Row IOE
Maximum performance
True dual-port memory
Simple dual-port memory
Single-port memory
Shift register
ROM
FIFO buffer
Pack mode
Byte enable
Address clock enable
Parity bits
Mixed clock mode
Memory initialization (.mif)
Table 2–2. Stratix II Device Routing Scheme (Part 2 of 2)
Table 2–3. TriMatrix Memory Features (Part 1 of 2)
Memory Feature
Source
TriMatrix memory consists of three types of RAM blocks: M512, M4K,
and M-RAM. Although these memory blocks are different, they can all
implement various types of memory with or without parity, including
true dual-port, simple dual-port, and single-port RAM, ROM, and FIFO
buffers.
blocks.
M512 RAM Block
(32 × 18 Bits)
500 MHz
Table 2–3
v
v
v
v
v
v
v
v
v
shows the size and features of the different RAM
v
v v v v
M4K RAM Block
(128 × 36 Bits)
Destination
550 MHz
v v
v
v
v
v
v
v
v
v
v
v
v
v
(4K × 144 Bits)
M-RAM Block
Altera Corporation
420 MHz
v
v
v
v
v
v
v
v
v
(1)
May 2007
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