EP20K200EFC484-2XN Altera, EP20K200EFC484-2XN Datasheet - Page 6

IC APEX 20KE FPGA 200K 484-FBGA

EP20K200EFC484-2XN

Manufacturer Part Number
EP20K200EFC484-2XN
Description
IC APEX 20KE FPGA 200K 484-FBGA
Manufacturer
Altera
Series
APEX-20K®r
Datasheet

Specifications of EP20K200EFC484-2XN

Number Of Logic Elements/cells
8320
Number Of Labs/clbs
832
Total Ram Bits
81920
Number Of I /o
376
Number Of Gates
404000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
APEX 20K
Number Of Usable Gates
200000
Number Of Logic Blocks/elements
8320
# Registers
52
# I/os (max)
376
Frequency (max)
205MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.8V
Logic Cells
8320
Ram Bits
106496
Device System Gates
526000
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (max)
1.89V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number:
EP20K200EFC484-2XN
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Quantity:
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Part Number:
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0
APEX 20K Programmable Logic Device Family Data Sheet
General
Description
6
APEX
architecture, which combines the strengths of LUT-based and product-
term-based devices with an enhanced memory structure. LUT-based logic
provides optimized performance and efficiency for data-path, register-
intensive, mathematical, or digital signal processing (DSP) designs.
Product-term-based logic is optimized for complex combinatorial paths,
such as complex state machines. LUT- and product-term-based logic
combined with memory functions and a wide variety of MegaCore and
AMPP functions make the APEX 20K device architecture uniquely suited
for system-on-a-programmable-chip designs. Applications historically
requiring a combination of LUT-, product-term-, and memory-based
devices can now be integrated into one APEX 20K device.
APEX 20KE devices are a superset of APEX 20K devices and include
additional features such as advanced I/O standard support, CAM,
additional global clocks, and enhanced ClockLock clock circuitry. In
addition, APEX 20KE devices extend the APEX 20K family to 1.5 million
gates. APEX 20KE devices are denoted with an “E” suffix in the device
name (e.g., the EP20K1000E device is an APEX 20KE device).
compares the features included in APEX 20K and APEX 20KE devices.
TM
20K devices are the first PLDs designed with the MultiCore
Altera Corporation
Table 8

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