EPF10K50VRC240-1 Altera, EPF10K50VRC240-1 Datasheet - Page 126
![IC FLEX 10KV FPGA 50K 240-RQFP](/photos/6/70/67070/544-240-rqfp_sml.jpg)
EPF10K50VRC240-1
Manufacturer Part Number
EPF10K50VRC240-1
Description
IC FLEX 10KV FPGA 50K 240-RQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet
1.EPF10K10ATC100-3.pdf
(128 pages)
Specifications of EPF10K50VRC240-1
Number Of Logic Elements/cells
2880
Number Of Labs/clbs
360
Total Ram Bits
20480
Number Of I /o
189
Number Of Gates
116000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-RQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1947
EPF10K50VRC240-1
EPF10K50VRC240-1
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Device Pin-
Outs
Revision
History
126
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Configuration device
Passive serial (PS)
Passive parallel asynchronous (PPA)
Passive parallel synchronous (PPS)
JTAG
Table 116. Data Sources for Configuration
Configuration Scheme
Multiple FLEX 10K devices can be configured in any of the five
configuration schemes by connecting the configuration enable (nCE) and
configuration enable output (nCEO) pins on each device.
See the Altera web site (http://www.altera.com) or the Altera Digital
Library for pin-out information.
The information contained in the FLEX 10K Embedded Programmable Logic
Device Family Data Sheet version 4.2 supersedes information published in
previous versions.
Version 4.2 Changes
The following change was made to version 4.2 of the FLEX 10K Embedded
Programmable Logic Device Family Data Sheet: updated
Version 4.1 Changes
The following changes were made to version 4.1 of the FLEX 10K
Embedded Programmable Logic Device Family Data Sheet.
Updated General Description section
Updated I/O Element section
Updated SameFrame Pin-Outs section
Updated Figure 16
Updated Tables 13 and 116
Added Note 9 to Table 19
Added Note 10 to Table 24
Added Note 10 to Table 28
EPC1, EPC2, EPC16, or EPC1441 configuration device
BitBlaster, MasterBlaster, or ByteBlasterMV download cable, or
serial data source
Parallel data source
Parallel data source
BitBlaster, MasterBlaster, or ByteBlasterMV download cable, or
microprocessor with Jam STAPL file or Jam Byte-Code file
Data Source
Figure
Altera Corporation
13.