EPF10K50VRC240-1 Altera, EPF10K50VRC240-1 Datasheet - Page 49
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EPF10K50VRC240-1
Manufacturer Part Number
EPF10K50VRC240-1
Description
IC FLEX 10KV FPGA 50K 240-RQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet
1.EPF10K10ATC100-3.pdf
(128 pages)
Specifications of EPF10K50VRC240-1
Number Of Logic Elements/cells
2880
Number Of Labs/clbs
360
Total Ram Bits
20480
Number Of I /o
189
Number Of Gates
116000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-RQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1947
EPF10K50VRC240-1
EPF10K50VRC240-1
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Altera Corporation
Notes to tables:
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10) This value is specified for normal device operation. The value may vary during power-up.
(11) This parameter applies to -1 speed grade EPF10K50V devices, -2 speed grade EPF10K50V industrial temperature
(12) Capacitance is sample-tested only.
Symbol
V
V
V
V
I
I
I
C
C
C
Symbol
I
OZ
CC0
Table 24. EPF10K50V & EPF10K130V Device DC Operating Conditions
Table 25. EPF10K50V & EPF10K130V Device Capacitance
IH
IL
OH
OL
IN
INCLK
OUT
See the Operating Requirements for Altera Devices Data Sheet.
Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to 5.75 V
for input currents less than 100 mA and periods shorter than 20 ns.
Numbers in parentheses are for industrial-temperature-range devices.
Maximum V
EPF10K50V and EPF10K130V device inputs may be driven before V
Typical values are for T
These values are specified under the EPF10K50V and EPF10K130V device Recommended Operating Conditions in
Table 23
The I
The I
well as output pins.
devices, and -2 speed grade EPF10K130V devices.
OH
OL
High-level input voltage
Low-level input voltage
3.3-V high-level TTL output
voltage
3.3-V high-level CMOS output
voltage
3.3-V low-level TTL output
voltage
3.3-V low-level CMOS output
voltage
Input pin leakage current
Tri-stated I/O pin leakage
current
V
Input capacitance
Input capacitance on dedicated
clock pin
Output capacitance
CC
parameter refers to low-level TTL or CMOS output current. This parameter applies to open-drain pins as
parameter refers to high-level TTL or CMOS output current.
on page 48.
supply current (standby)
CC
rise time is 100 ms. V
Parameter
Parameter
A
= 25 C and V
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
CC
CC
must rise monotonically.
I
I
I
I
V
V
V
V
V
V
V
OH
OH
OL
OL
IN
IN
OUT
I
O
I
I
= 3.3 V.
= 5.3 V to –0.3 V
= ground, no load
= ground, no load
= 5.3 V to –0.3 V
= 8 mA DC
= 0.1 mA DC
= 0 V, f = 1.0 MHz
= 0 V, f = 1.0 MHz
= –8 mA DC
= –0.1 mA DC
= 0 V, f = 1.0 MHz
Conditions
Conditions
(9)
(8)
(9)
(8)
(10)
(11)
(10)
(12)
CCINT
V
CCIO
–0.5
Min
–10
–10
and V
2.0
2.4
– 0.2
Notes
CCIO
Min
(6),
are powered.
Typ
0.3
10
(7)
Max
5.75
0.45
Max
0.8
0.2
10
10
10
10
15
10
Unit
Unit
mA
mA
pF
pF
pF
V
V
V
V
V
V
49
A
A