EP2S60F1020C4 Altera, EP2S60F1020C4 Datasheet - Page 60
EP2S60F1020C4
Manufacturer Part Number
EP2S60F1020C4
Description
IC STRATIX II FPGA 60K 1020-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S60F1020C4
Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
718
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
For Use With
544-1700 - DSP KIT W/STRATIX II EP2S60N544-1697 - NIOS II KIT W/STRATIX II EP2S60N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1131
EP2S60F1020C4ES
EP2S60F1020C4ES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2S60F1020C4
Manufacturer:
ALTERA
Quantity:
1 238
Company:
Part Number:
EP2S60F1020C4
Manufacturer:
ALTERA
Quantity:
3 000
Company:
Part Number:
EP2S60F1020C4N
Manufacturer:
ALTERA
Quantity:
3
Part Number:
EP2S60F1020C4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
PLLs & Clock Networks
Figure 2–35. EP2S15 & EP2S30 Device I/O Clock Groups
2–52
Stratix II Device Handbook, Volume 1
IO_CLKH[7:0]
IO_CLKG[7:0]
8
8
8
IOE clocks have row and column block regions that are clocked by eight
I/O clock signals chosen from the 24 quadrant clock resources.
Figures 2–35
regions.
the Quadrant
the Quadrant
24 Clocks in
24 Clocks in
IO_CLKA[7:0]
IO_CLKF[7:0]
and
8
2–36
show the quadrant relationship to the I/O clock
IO_CLKB[7:0]
IO_CLKE[7:0]
8
the Quadrant
the Quadrant
24 Clocks in
24 Clocks in
8
Altera Corporation
8
8
I/O Clock Regions
IO_CLKC[7:0]
IO_CLKD[7:0]
May 2007