EP1SGX40DF1020C5N Altera, EP1SGX40DF1020C5N Datasheet - Page 199
EP1SGX40DF1020C5N
Manufacturer Part Number
EP1SGX40DF1020C5N
Description
IC STRATIX GX FPGA 40K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet
1.EP1SGX10CF672C7N.pdf
(272 pages)
Specifications of EP1SGX40DF1020C5N
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
624
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Stratix GX
Automated
Single Event
Upset (SEU)
Detection
Altera Corporation
February 2005
Local Update Mode
Local update mode is a simplified version of the remote update. This
feature is intended for simple systems that need to load a single
application configuration immediately upon power-up without loading
the factory configuration first. Local update designs have only one
application configuration to load, so it does not require a factory
configuration to determine which application configuration to use.
Figure 5–3
Figure 5–3. Local Update Transition Diagram
Stratix GX devices offer on-chip circuitry for automated checking of
single event upset (SEU) detection. Some applications that require the
device to operate error free at high elevations or in close proximity to
earth’s North or South Pole require periodic checks to ensure continued
data integrity. The error detection cyclic redundancy code (CRC) feature
controlled by the Device & Pin Options dialog box in the Quartus II
software uses a 32-bit CRC circuit to ensure data reliability and is one of
the best options for mitigating SEU.
nCONFIG
shows the transition diagram for local update mode.
Configuration
Error
Configuration
Configuration
or nCONFIG
Application
Power-Up
Factory
Stratix GX Device Handbook, Volume 1
Configuration
Error
Configuration & Testing
nCONFIG
5–7
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