EP2S180F1020C3N Altera, EP2S180F1020C3N Datasheet - Page 57

• Manufacturer Part Number: EP2S180F1020C3N
• Description: IC STRATIX II FPGA 180K 1020FBGA
• Manufacturer: Altera
• Series: Stratix® IIr

Specifications of EP2S180F1020C3N

• Number Of Logic Elements/cells: 179400
• Number Of Labs/clbs: 8970
• Total Ram Bits: 9383040
• Number Of I /o: 742
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1020-FBGA
• For Use With: 544-1701 - DSP PRO KIT W/SII EP2S180N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1883; EP2S180F1020C3N; Q2675539B

Altera Corporation
May 2007
global clock networks can also be driven by internal logic for internally
generated global clocks and asynchronous clears, clock enables, or other
control signals with large fanout.
pins driving global clock networks.
Figure 2–31. Global Clocking
Regional Clock Network
There are eight regional clock networks RCLK[7..0] in each quadrant of
the Stratix II device that are driven by the dedicated CLK[15..0] input
pins, by PLL outputs, or by internal logic. The regional clock networks
provide the lowest clock delay and skew for logic contained in a single
quadrant. The CLK clock pins symmetrically drive the RCLK networks in
a particular quadrant, as shown in
CLK[3..0]
Global Clock [15..0]
CLK[7..4]
Figure 2–31
Figure
Stratix II Device Handbook, Volume 1
CLK[15..12]
Global Clock [15..0]
2–32.
shows the 16 dedicated CLK
Stratix II Architecture
CLK[11..8]
2–49