EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 119

• Manufacturer Part Number: EP4SGX530HH35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: Stratix® IV GXr

Specifications of EP4SGX530HH35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 564
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Family Name: Stratix® IV
• Number Of Logic Blocks/elements: 531200
• # Registers: 424960
• # I/os (max): 560
• Process Technology: 40nm
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 531200
• Ram Bits: 28033024
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1152
• Package Type: FCHBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Clock Networks in Stratix IV Devices
Table 5–1. Clock Resources in Stratix IV Devices
© March 2010
SIV51005-3.1
Clock input pins
GCLK networks
RCLK networks
PCLK networks
GCLKs/RCLKs per
quadrant
GCLKs/RCLKs per device
Notes to
(1) There are 64 RCLKs in the EP4S40G2, EP4S100G2, EP4SE230, EP4SGX70, EP4SGX110, EP4SGX180, and EP4SGX230 devices. There are 88 RCLKs
(2) There are 56 PCLKs in the EP4SGX70, and EP4SGX110 devices. There are 88 PCLKs in the EP4S40G2, EP4S100G2, EP4SE230, EP4SE360,
(3) There are 32 GCLKs/RCLKs per quadrant in the EP4S40G2, EP4S100G2, EP4SE230, EP4SGX70, EP4SGX110, EP4SGX180, and EP4SGX230 devices.
(4) There are 80 GCLKs/RCLKs per entire device in the EP4S40G2, EP4S100G2, EP4SE230, EP4SGX70, EP4SGX110, EP4SGX180, and EP4SGX230
in the EP4S40G5, EP4S100G3, EP4S100G4, EP4S100G5, EP4SE360, EP4SE530, EP4SE820, EP4SGX290, EP4SGX360, and EP4SGX530 devices.
EP4SGX180, EP4SGX230, EP4SGX290, and EP4SGX360 devices. There are 112 PCLKs in the EP4S40G5, EP4S100G3, EP4S100G4, EP4S100G5,
EP4SE530 and EP4SGX530 devices. There are 132 PCLKs in the EP4SE820 device.
There are 38 GCLKs/RCLKs per quadrant in the EP4S40G5, EP4S100G3, EP4S100G4, EP4S100G5, EP4SE360, EP4SE530, EP4SE820, EP4SGX290,
EP4SGX360, and EP4SGX530 devices.
devices. There are 104 GCLKs/RCLKS per entire device in the EP4S40G5, EP4S100G3, EP4S100G4, EP4S100G5, EP4SE360, EP4SE530, EP4SE820,
EP4SGX290, EP4SGX360, and EP4SGX530 devices.
Clock Resource
Table
Altera Corporation
5–1:
This chapter describes the hierarchical clock networks and phase-locked loops (PLLs)
which have advanced features in Stratix
ability to reconfigure the PLL counter clock frequency and phase shift in real time,
allowing you to sweep PLL output frequencies and dynamically adjust the output
clock phase shift.
The Quartus
The following sections describe the Stratix IV clock networks and PLLs in detail:
■
■
The global clock networks (GCLKs), regional clock networks (RCLKs), and periphery
clock networks (PCLKs) available in Stratix IV devices are organized into hierarchical
clock structures that provide up to 236 unique clock domains (16 GCLKs + 88 RCLKs
+ 132 PCLKs) within the Stratix IV device and allow up to 71 unique GCLK, RCLK,
and PCLK clock sources (16 GCLKs + 22 RCLKs + 33 PCLKs) per device quadrant.
Table 5–1
“Clock Networks in Stratix IV Devices” on page 5–1
“PLLs in Stratix IV Devices” on page 5–19
Number of Resources Available
56/88/112/132 (33 per device
lists the clock resources available in Stratix IV devices.
32 Single-ended
(16 Differential)
®
quadrant)
II software enables the PLLs and their features without external devices.
80/104
64/88
32/38
16
(1)
(3)
(4)
(2)
CLK[0..15]p and CLK[0..15]n pins, PLL clock outputs,
CLK[0..15]p and CLK[0..15]n pins, PLL clock outputs,
DPA clock outputs, PLD-transceiver interface clocks, horizontal
5. Clock Networks and PLLs in
®
IV devices. It includes details about the
CLK[0..15]p and CLK[0..15]n pins
Source of Clock Resource
I/O pins, and logic array
16 GCLKs + 16 RCLKs
16 GCLKs + 22 RCLKs
16 GCLKs + 64 RCLKs
16 GCLKs + 88 RCLKs
and logic array
and logic array
Stratix IV Devices
Stratix IV Device Handbook Volume 1