XC3S250E-5VQG100C Xilinx Inc, XC3S250E-5VQG100C Datasheet - Page 171

IC FPGA SPARTAN-3E 250K 100-VQFP

XC3S250E-5VQG100C

Manufacturer Part Number
XC3S250E-5VQG100C
Description
IC FPGA SPARTAN-3E 250K 100-VQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet

Specifications of XC3S250E-5VQG100C

Number Of Logic Elements/cells
5508
Number Of Labs/clbs
612
Total Ram Bits
221184
Number Of I /o
66
Number Of Gates
250000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number:
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Part Number:
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0
User I/Os by Bank
Table 132
distributed between the four I/O banks on the VQ100 pack-
age.
Table 132: User I/Os Per Bank for XC3S100E, XC3S250E, and XC3S500E in the VQ100 Package
Footprint Migration Differences
The production XC3S100E, XC3S250E, and XC3S500E
FPGAs have identical footprints in the VQ100 package.
Designs can migrate between the devices without further
consideration.
DS312-4 (v3.8) August 26, 2009
Product Specification
Notes:
1.
2.
Top
Right
Bottom
Left
TOTAL
Package
Edge
Some VREF and CLK pins are on INPUT pins.
The eight global clock pins in this bank have optional functionality during configuration and are counted in the DUAL column.
indicates how the 66 available user-I/O pins are
R
I/O Bank
0
1
2
3
Maximum
I/O
15
15
19
17
66
I/O
16
5
6
0
5
www.xilinx.com
INPUT
0
0
0
1
1
All Possible I/O Pins by Type
DUAL
18
21
1
0
2
VREF
1
1
1
1
4
(1)
Pinout Descriptions
CLK
0
24
8
8
8
(2)
(1)
171

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