XA3S400-4FGG456I Xilinx Inc, XA3S400-4FGG456I Datasheet - Page 3

• Manufacturer Part Number: XA3S400-4FGG456I
• Description: IC FPGA SPARTAN-3 400K 456-FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3 XAr

Specifications of XA3S400-4FGG456I

• Number Of Logic Elements/cells: 8064
• Number Of Labs/clbs: 896
• Total Ram Bits: 294912
• Number Of I /o: 264
• Number Of Gates: 400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 456-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Configuration
Spartan-3 FPGAs are programmed by loading configuration
data into robust static memory cells that collectively control
all functional elements and routing resources. Before
powering on the FPGA, configuration data is stored
externally in a PROM or some other nonvolatile medium
either on or off the board. After applying power, the
configuration data is written to the FPGA using any of five
different modes: Master Parallel, Slave Parallel, Master
Serial, Slave Serial and Boundary Scan (JTAG). The Master
and Slave Parallel modes use an 8-bit-wide SelectMAP
port.
.
DS314 (v1.3) June 18, 2009
Product Specification
R
Notes:
1.
The XA3S50 has only the block RAM column on the far left.
Figure 1: Spartan-3 Family Architecture
www.xilinx.com
I/O Capabilities
The SelectIO feature of Spartan-3 devices supports 18
single-ended standards and eight differential standards as
listed in
which uses integrated terminations to eliminate unwanted
signal reflections.
well as the number of differential I/O pairs available for each
device/package combination.
Table
2. Many standards support the DCI feature,
Table 3
Introduction and Ordering Information
DS314-1_01_100808
shows the number of user I/Os as
3