XC3S1200E-4FTG256I Xilinx Inc, XC3S1200E-4FTG256I Datasheet - Page 211

• Manufacturer Part Number: XC3S1200E-4FTG256I
• Description: IC FPGA SPARTAN3E 1200K 256FTBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3Er

Specifications of XC3S1200E-4FTG256I

• Number Of Logic Elements/cells: 19512
• Number Of Labs/clbs: 2168
• Total Ram Bits: 516096
• Number Of I /o: 190
• Number Of Gates: 1200000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-LBGA
• Package: 256FTBGA
• Family Name: Spartan®-3E
• Device Logic Cells: 19512
• Device Logic Units: 2168
• Device System Gates: 1200000
• Number Of Registers: 17344
• Maximum Internal Frequency: 572 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 190
• Ram Bits: 516096
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 148: FG320 Package Pinout (Continued)
DS312-4 (v3.8) August 26, 2009
Product Specification
VCCAUX
Bank
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3
3
3
3
3
3
3
3
3
R
IP
IP
IP/VREF_3
IO/VREF_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DONE
XC3S500E Pin Name
IP
IP
IP/VREF_3
IP/VREF_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DONE
XC3S1200E Pin Name
www.xilinx.com
IP
IP
IP/VREF_3
IP/VREF_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DONE
XC3S1600E Pin Name
FG320
M12
Ball
C10
G12
H10
H11
U17
A18
B17
K11
K16
L10
L11
V18
V17
J11
R1
U1
R4
H7
N3
G7
H8
H9
M7
U2
F3
K1
A1
B2
K8
T9
V1
J6
L7
J3
J8
L8
L9
Pinout Descriptions
500E: VREF(I/O)
VREF(INPUT)
VREF(INPUT)
CONFIG
1200E:
1600E:
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
VCCO
VREF
Type
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
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