XCV405E-8FG676C Xilinx Inc, XCV405E-8FG676C Datasheet - Page 86
![IC FPGA 1.8V C-TEMP 676-FBGA](/photos/6/73/67300/b-676_sml.jpg)
XCV405E-8FG676C
Manufacturer Part Number
XCV405E-8FG676C
Description
IC FPGA 1.8V C-TEMP 676-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-E EMr
Datasheet
1.XCV405E-6FG676C.pdf
(118 pages)
Specifications of XCV405E-8FG676C
Number Of Logic Elements/cells
10800
Number Of Labs/clbs
2400
Total Ram Bits
573440
Number Of I /o
404
Number Of Gates
129600
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XCV405E-8FG676C
Manufacturer:
XilinxInc
Quantity:
3 000
Virtex™-E 1.8 V Extended Memory Field Programmable Gate Arrays
BG560 Differential Pin Pairs
Virtex-E Extended Memory devices have differential pin
pairs that can also provide other functions when not used as
a differential pair. A √ in the AO column indicates that the pin
pair can be used as an asynchronous output for all devices
provided in this package.
Pairs with a note number in the AO column are device
dependent. They can have asynchronous outputs if the pin
pair is in the same CLB row and column in the device. Num-
bers in this column refer to footnotes that indicate which
devices have pin pairs that can be asynchronous outputs.
The Other Functions column indicates alternative func-
tion(s) not available when the pair is used as a differential
pair or differential clock.
Table 2:
Module 4 of 4
10
Pair
10
11
12
13
14
15
3
2
1
0
0
1
2
3
4
5
6
7
8
9
Total Outputs: 183, Asyncronous Outputs: 79
Bank
0
1
5
4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BG560 Package Differential Pin Pair Summary
XCV405E and XCV812E
AJ17
AL17
Global Differential Clock
D17
D29
C29
D27
C27
C26
D24
C23
D22
C21
A17
A31
B29
A28
B26
A25
B24
B22
Pin
P
IO LVDS
AM18
AM17
C18
D28
D26
D25
C25
D23
D21
E17
E28
E27
B30
E26
E25
E24
E23
E22
A23
E21
Pin
N
AO
NA
NA
NA
NA
NA
NA
NA
√
√
1
√
√
1
1
1
√
√
√
√
1
IO LVDS 115
IO LVDS 115
IO LVDS 21
IO LVDS 21
Functions
VREF_0
VREF_0
VREF_0
VREF_0
VREF_0
Other
-
-
-
-
-
-
-
-
-
-
-
www.xilinx.com
1-800-255-7778
Table 2:
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
BG560 Package Differential Pin Pair Summary
XCV405E and XCV812E
E20
C20
E19
C19
D18
B17
D16
C16
C15
E15
D14
E14
D13
E13
D12
C11
D11
D10
E17
G5
A9
B8
C8
A6
D8
B5
D7
B4
E7
A2
D4
D2
F5
F4
D20
D19
C18
C17
D15
C14
C13
C12
C10
B21
B20
A19
B16
E16
A15
A13
A11
B11
B10
E10
C9
A8
B7
C7
A5
C6
A4
C5
D6
E4
B3
C1
E3
G4
DS025-4 (v1.6) July 17, 2002
NA
NA
NA
NA
NA
NA
NA
√
√
1
1
1
1
1
√
√
1
√
√
√
√
2
1
1
√
√
2
√
√
√
√
2
1
1
GCLK LVDS 3/2
VREF_0
VREF_0
VREF_1
VREF_1
VREF_1
VREF_1
VREF_1
VREF_1
VREF_1
VREF_2
DIN_D0
CS
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R