AT40K10LV-3AJC Atmel, AT40K10LV-3AJC Datasheet - Page 63
![IC FPGA 3.3V 576 CELL 84-PLCC](/photos/6/70/67047/453-84-plcc_sml.jpg)
AT40K10LV-3AJC
Manufacturer Part Number
AT40K10LV-3AJC
Description
IC FPGA 3.3V 576 CELL 84-PLCC
Manufacturer
Atmel
Series
AT40K/KLVr
Datasheet
1.AT40K05-2BQC.pdf
(67 pages)
Specifications of AT40K10LV-3AJC
Number Of Logic Elements/cells
576
Total Ram Bits
4608
Number Of I /o
62
Number Of Gates
20000
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
84-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Labs/clbs
-
208Q1 – TQFP
0896C–FPGA–04/02
Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc.
R
2325 Orchard Parkway
San Jose, CA 95131
2. The top package body size may be smaller than the bottom package size by as much as 0.15 mm.
3. Dimensions D1 and E1 do not include mold protrusions. Allowable protrusion is 0.25 mm per side. D1 and E1 are maximum plastic
4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall not cause the lead width to exceed the maximum b
body size dimensions including mold mismatch.
dimension by more than 0.08 mm. Dambar cannot be located on the lower radius or the foot. Minimum space between protrusion
and an adjacent lead is 0.07 mm.
e
Bottom View
Top View
D1
D
TITLE
b
208Q1, 208-lead (28 x 28 mm Body, 2.6 Form Opt.),
Plastic Quad Flat Pack (PQFP)
E1
E
AT40K/AT40KLV Series FPGA
L1
SYMBOL
A1
A2
D
E
E1
e
b
L1
D1
COMMON DIMENSIONS
MIN
0.25
3.20
0.17
(Unit of Measure = mm)
Side View
30.60 BSC
28.00 BSC
30.60 BSC
28.00 BSC
1.30 REF
0.50 BSC
NOM
3.40
DRAWING NO.
208Q1
MAX
0.50
3.60
0.27
A1
A1
NOTE
11/30/01
2, 3
2, 3
4
A2
REV.
A
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