XC5204-5PC84C Xilinx Inc, XC5204-5PC84C Datasheet - Page 42
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XC5204-5PC84C
Manufacturer Part Number
XC5204-5PC84C
Description
IC FPGA 120 CLB'S 84-PLCC
Manufacturer
Xilinx Inc
Series
XC5200r
Datasheet
1.XC5204-5PC84C.pdf
(73 pages)
Specifications of XC5204-5PC84C
Number Of Logic Elements/cells
480
Number Of Labs/clbs
120
Number Of I /o
65
Number Of Gates
6000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
84-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Total Ram Bits
-
Other names
Q4083139
T0670828
T0670828
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5204-5PC84C
Manufacturer:
XILINX
Quantity:
12 388
XC5200 Series Field Programmable Gate Arrays
Table 13.
Notes: 1. A shaded table cell represents a 20-k to 100-k pull-up resistor before and during configuration.
7-124
PROGRAM (I)
M1 (HIGH) (I)
M0 (HIGH) (I)
M2 (HIGH) (I)
INIT-ERROR
HDC (HIGH)
LDC (LOW)
CCLK (I)
<1:1:1>
SLAVE
DONE
DIN (I)
DOUT
TMS
TDO
TCK
TDI
2. (I) represents an input (O) represents an output.
3. INIT is an open-drain output during configuration.
Pin Functions During Configuration
MASTER-SER
PROGRAM (I)
M1 (LOW) (I)
M0 (LOW) (I)
M2 (LOW) (I)
INIT-ERROR
HDC (HIGH)
LDC (LOW)
CCLK (O)
<0:0:0>
DONE
DIN (I)
DOUT
TMS
TDO
TCK
TDI
PROGRAM (I)
SYN.PERIPH
M1 (HIGH) (I)
M0 (HIGH) (I)
M2 (LOW) (I)
INIT-ERROR
HDC (HIGH)
LDC (LOW)
RDY/BUSY
DATA 7 (I)
DATA 6 (I)
DATA 5 (I)
DATA 4 (I)
DATA 3 (I)
DATA 2 (I)
DATA 1 (I)
DATA 0 (I)
CCLK (I)
CONFIGURATION MODE: <M2:M1:M0>
<0:1:1>
DONE
DOUT
TMS
TDO
TCK
TDI
ASYN.PERIPH
PROGRAM (I)
M0 (HIGH) (I)
M2 (HIGH) (I)
M1 (LOW) (I)
INIT-ERROR
HDC (HIGH)
LDC (LOW)
RDY/BUSY
DATA 7 (I)
DATA 6 (I)
DATA 5 (I)
DATA 4 (I)
DATA 3 (I)
DATA 2 (I)
DATA 1 (I)
DATA 0 (I)
CCLK (O)
<1:0:1>
CSO (I)
CS1 (I)
DONE
DOUT
WS (I)
RS (I)
TMS
TDO
TCK
TDI
MASTER-HIGH
PROGRAM (I)
M1 (HIGH) (I)
M2 (HIGH) (I)
M0 (LOW) (I)
INIT-ERROR
HDC (HIGH)
LDC (LOW)
DATA 7 (I)
DATA 6 (I)
DATA 5 (I)
DATA 4 (I)
DATA 3 (I)
DATA 2 (I)
DATA 1 (I)
DATA 0 (I)
CCLK (O)
<1:1:0>
DONE
DOUT
RCLK
TMS
TDO
TCK
A16
A17
A10
A11
A12
A13
A14
A15
TDI
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
MASTER-LOW
PROGRAM (I)
M2 (HIGH) (I)
M1 (LOW) (I)
M0 (LOW) (I)
INIT-ERROR
HDC (HIGH)
LDC (LOW)
DATA 7 (I)
DATA 6 (I)
DATA 5 (I)
DATA 4 (I)
DATA 3 (I)
DATA 2 (I)
DATA 1 (I)
DATA 0 (I)
CCLK (O)
<1:0:0>
DONE
DOUT
RCLK
TMS
TDO
TCK
A16
A17
A10
A11
A12
A13
A14
A15
TDI
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
November 5, 1998 (Version 5.2)
PROGRAM (I)
M1 (HIGH) (I)
M0 (LOW) (I)
M2 (LOW) (I)
INIT-ERROR
HDC (HIGH)
LDC (LOW)
EXPRESS
DATA 7 (I)
DATA 6 (I)
DATA 5 (I)
DATA 4 (I)
DATA 3 (I)
DATA 2 (I)
DATA 1 (I)
DATA 0 (I)
CCLK (I)
<0:1:0>
CS1 (I)
DONE
DOUT
TMS
TDO
TCK
TDI
ALL OTHERS
OPERATION
PROGRAM
GCK1-I/O
GCK2-I/O
GCK3-I/O
GCK4-I/O
CCLK (I)
TMS-I/O
TDO-I/O
TCK-I/O
TDI-I/O
DONE
USER
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
R