AT94K05AL-25BQC Atmel, AT94K05AL-25BQC Datasheet - Page 90
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
AT94K05AL-25BQC
Manufacturer Part Number
AT94K05AL-25BQC
Description
IC FPSLIC 5K GATE 25MHZ 144LQFP
Manufacturer
Atmel
Series
FPSLIC®r
Specifications of AT94K05AL-25BQC
Core Type
8-bit AVR
Speed
25MHz
Interface
I²C, UART
Program Sram Bytes
4K-16K
Fpga Sram
2kb
Data Sram Bytes
4K ~ 16K
Fpga Core Cells
256
Fpga Gates
5K
Fpga Registers
436
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
144-LQFP
For Use With
ATSTK594 - BOARD FPSLIC DAUGHTER FOR STK500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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4.25
90
8-bit Timers/Counters T/C0 and T/C2
AT94KAL Series FPSLIC
Figure 4-26. Timer/Counter2 Prescaler
Special Function I/O Register – SFIOR
• Bits 7..2 - Res: Reserved Bits
These bits are reserved bits in the FPSLIC and are always read as zero.
• Bit 1 - PSR2: Prescaler Reset Timer/Counter2
When this bit is set (one) the Timer/Counter2 prescaler will be reset. The bit will be cleared by
the hardware after the operation is performed. Writing a zero to this bit will have no effect. This
bit will always be read as zero if Timer/Counter2 is clocked by the internal CPU clock. If this bit is
written when Timer/Counter2 is operating in asynchronous mode; however, the bit will remain as
one until the prescaler has been reset. See
page 99
• Bit 0 - PSR10: Prescaler Reset Timer/Counter1 and Timer/Counter0
When this bit is set (one) the Timer/Counter1 and Timer/Counter0 prescaler will be reset. The bit
will be cleared by the hardware after the operation is performed. Writing a zero to this bit will
have no effect. Note that Timer/Counter1 and Timer/Counter0 share the same prescaler and a
reset of this prescaler will affect both timers. This bit will always be read as zero.
Figure 4-27
for Timer/Counter2.
Bit
$30 ($50)
Read/Write
Initial Value
TOSC1
for a detailed description of asynchronous operation.
PSR2
CS20
CS21
CS22
AS2
CK
shows the block diagram for Timer/Counter0.
7
-
R
0
6
-
R
0
PCK2
5
-
R
0
Clear
4
-
R
0
TIMER/COUNTER2 CLOCK SOURCE
“Asynchronous Operation of Timer/Counter2” on
3
-
R
0
0
10-BIT T/C PRESCALER
TCK2
2
-
R
0
Figure 4-28
1
PSR2
R/W
0
shows the block diagram
0
PSR10
R/W
0
SFIOR
1138I–FPSLI–1/08
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