CY7C68013A-56PVXC Cypress Semiconductor Corp, CY7C68013A-56PVXC Datasheet - Page 2
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CY7C68013A-56PVXC
Manufacturer Part Number
CY7C68013A-56PVXC
Description
IC MCU USB PERIPH HI SPD 56SSOP
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX2LP™r
Specifications of CY7C68013A-56PVXC
Package / Case
56-SSOP
Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
CY7C680xx
Ram Size
16K x 8
Interface
I²C, USB, USART
Number Of I /o
24
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 105 C
Supply Current
50 mA
Operating Supply Voltage
3 V to 3.6 V
Controller Family/series
(8051) USB
Core Size
8 Bit
No. Of I/o's
24
Program Memory Size
16KB
Cpu Speed
48MHz
No. Of Timers
3
Embedded Interface Type
I2C, USART, USB
Rohs Compliant
Yes
Data Bus Width
8 bit
Data Ram Size
16 KB
Interface Type
I2C, USART, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4611B - KIT USB TO ATA REFERENCE DESIGN428-1677 - KIT DEVELOPMENT EZ-USB FX2LP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-1627
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C68013A-56PVXC
Manufacturer:
AD
Quantity:
1 200
Company:
Part Number:
CY7C68013A-56PVXC
Manufacturer:
CY
Quantity:
5 530
Company:
Part Number:
CY7C68013A-56PVXC
Manufacturer:
CY
Quantity:
6 100
Company:
Part Number:
CY7C68013A-56PVXC
Manufacturer:
CYPRESS
Quantity:
3 900
Part Number:
CY7C68013A-56PVXC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Company:
Part Number:
CY7C68013A-56PVXCES
Manufacturer:
CY
Quantity:
5
1.1 Features (CY7C68013A/14A only)
■
■
■
1.2 Features (CY7C68015A/16A only)
■
■
■
Cypress’s EZ-USB FX2LP™ (CY7C68013A/14A) is a low power
version of the EZ-USB FX2™ (CY7C68013), which is a highly
integrated, low power USB 2.0 microcontroller. By integrating the
USB 2.0 transceiver, serial interface engine (SIE), enhanced
8051 microcontroller, and a programmable peripheral interface
in a single chip,
Document #: 38-08032 Rev. *M
Logic Block Diagram
CY7C68014A: Ideal for Battery Powered Applications
❐
CY7C68013A: Ideal for Non-battery Powered Applications
❐
Available in Five Pb-free Packages with Up to 40 GPIOs
❐
CY7C68016A: Ideal for Battery Powered Applications
❐
CY7C68015A: Ideal for Non-battery Powered Applications
❐
Available in Pb-free 56-pin QFN Package (26 GPIOs)
❐
Suspend current: 100 μA (typ)
Suspend current: 300 μA (typ)
128-pin TQFP (40 GPIOs), 100-pin TQFP (40 GPIOs), 56-pin
QFN (24 GPIOs), 56-pin SSOP (24 GPIOs), and 56-pin VF-
BGA (24 GPIOs)
Suspend current: 100 μA (typ)
Suspend current: 300 μA (typ)
Two more GPIOs than CY7C68013A/14A enabling additional
features in same footprint
full speed and
Integrated
high speed
XCVR
D+
D–
FX2LP
VCC
1.5k
connected for
full speed
Enhanced USB core
Simplifies 8051 code
XCVR
USB
24 MHz
Ext. XTAL
2.0
x20
PLL
/0.5
/1.0
/2.0
1.1/2.0
Smart
Engine
USB
CY
High performance micro
using standard tools
with lower-power options
four clocks/cycle
Easy firmware changes
12/24/48 MHz,
8051 Core
“Soft Configuration”
16 KB
RAM
Cypress has created a cost effective solution that provides
superior time-to-market advantages with low power to enable
bus powered applications.
The ingenious architecture of FX2LP results in data transfer
rates of over 53 Mbytes per second, the maximum allowable
USB 2.0 bandwidth, while still using a low cost 8051 microcon-
troller in a package as small as a 56 VFBGA (5 mm x 5 mm).
Because it incorporates the USB 2.0 transceiver, the FX2LP is
more economical, providing a smaller footprint solution than
USB 2.0 SIE or external transceiver implementations. With
EZ-USB FX2LP, the Cypress Smart SIE handles most of the
USB 1.1 and 2.0 protocol in hardware, freeing the embedded
microcontroller for application specific functions and decreasing
development time to ensure USB compatibility.
The General Programmable Interface (GPIF) and Master/Slave
Endpoint FIFO (8-bit or 16-bit data bus) provides an easy and
glueless interface to popular interfaces such as ATA, UTOPIA,
EPP, PCMCIA, and most DSP/processors.
The FX2LP draws less current than the FX2 (CY7C68013), has
double the on-chip code/data RAM, and is fit, form and function
compatible with the 56, 100, and 128 pin FX2.
Five packages are defined for the family: 56VFBGA, 56 SSOP,
56 QFN, 100 TQFP, and 128 TQFP.
ECC
FIFO and endpoint memory
(master or slave operation)
Additional I/Os (24)
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
GPIF
FIFO
4 kB
Master
I
2
C
ADDR (9)
RDY (6)
CTL (6)
8/16
including two USARTS
standards such as
ATAPI, EPP, etc.
programmable I/F
General
to ASIC/DSP or bus
Up to 96 MBytes/s
Abundant I/O
burst rate
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