XE8801AMI027LF Semtech, XE8801AMI027LF Datasheet - Page 90

• Manufacturer Part Number: XE8801AMI027LF
• Description: IC DAS 16BIT FLASH 8K MTP 44LQFP
• Manufacturer: Semtech

Specifications of XE8801AMI027LF

• Applications: Sensing Machine
• Core Processor: RISC
• Program Memory Type: FLASH (22 kB)
• Controller Series: XE8000
• Ram Size: 512 x 8
• Interface: UART, USRT
• Number Of I /o: 24
• Voltage - Supply: 2.4 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-LQFP
• For Use With: XE8000MP - PROG BOARD AND PROSTART2 CARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Like most ADCs intended for instrumentation or sensing applications, the ZoomingADC™ is an over-sampled
converter (See Note
positive and negative input voltages). In first approximation, the ADC output result relative to full-scale (FS) delivers
the quantity:
in two's complement (see Sections 16.4 and 16.7 for details). The output code OUT
-V
relationship:
where GD
1 Note: Over-sampled converters are operated with a sampling frequency f
1'000 times the input signal bandwidth). The sampling frequency to throughput ratio is large (typically 10-500). These converters include digital
decimation filtering. They are mainly used for high resolution, and/or low-to-medium speed applications.
© Semtech 2005
REF
/2 to +V
V
OUT
IN
FS
TOT
,
ADC
2 /
ADC
is the total PGA gain, and GDoff
REF
=
/2 respectively. As will be shown in section 16.6, V
≅
GD
V
V
1
REF
TOT
IN
). The ADC is a so-called incremental converter, with bipolar operation (the ADC accepts both
,
ADC
⋅
2 /
V
Inputs
AC_A
AC_R
IN
RegACCfg5
RegACCfg4
RegACCfg3
RegACCfg2
RegACCfg1
RegACCfg0
−
GDoff
Figure 16-2. ZoomingADC™ detailed functional block diagram
0
1
2
3
4
5
6
7
0
1
2
3
TOT
⋅
V
V
REF
5
IN
Power Saving Modes
PGA Enabling
Conversion Start
Nbr of Elementary Cycles
Over-Sampling Ratio
Continuous vs. On-Request
V
f
S
(V)
REF
TOT
PGA1
GD1
2
is the total PGA offset.
OFF2
4
PGA2
GD2
16-5
S
much higher than the input signal's Nyquist rate (typically f
7
OFF3
7
PGA3
GD3
ADC Busy Flag
Default Settings
Sampling Frequency f
RegACOutMSB
RegACOutLSB
IN,ADC
(Eq. 1)
(Eq. 2)
Acquisition Chain
Register Bank
is related to input voltage V
V
IN,ADC
XE8801A – SX8801R
ADC
ADC
f
S
is -FS/2 to +FS/2 for V
8
8
S
www.semtech.com
IN
IN,ADC
by the
S
is 20-
≅