MM908E626AVEK Freescale Semiconductor, MM908E626AVEK Datasheet - Page 19

IC STEPPER MOTOR DRIVER 54-SOIC

MM908E626AVEK

Manufacturer Part Number
MM908E626AVEK
Description
IC STEPPER MOTOR DRIVER 54-SOIC
Manufacturer
Freescale Semiconductor
Type
Stepper Motor Driverr
Datasheet

Specifications of MM908E626AVEK

Applications
Automotive Mirror Control
Core Processor
HC08
Program Memory Type
FLASH (16 kB)
Controller Series
908E
Ram Size
512 x 8
Interface
SCI, SPI
Number Of I /o
13
Voltage - Supply
8 V ~ 18 V
Operating Temperature
-40°C ~ 115°C
Mounting Type
Surface Mount
Package / Case
54-SOIC (7.5mm Width) Exposed Pad, 54-eSOIC, 54-HSOIC
Product
Stepper Motor Controllers / Drivers
Supply Current
20 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MM908E626AVEK
Manufacturer:
FREESCALE
Quantity:
20 000
writing has no effect. Therefore, a high temperature interrupt
cannot be lost due to inadvertent clearing of HTF. Reset
clears the HTF bit. Writing a logic [0] to HTF has no effect.
LVF — LOW VOLTAGE FLAG BIT
LVF by writing a logic [1] to LVF. If a low voltage condition is
still present while writing a logic [1] to LVF, the writing has no
effect. Therefore, a low voltage interrupt cannot be lost due
to inadvertent clearing of LVF. Reset clears the LVF bit.
Writing a logic [0] to LVF has no effect.
HVF — HIGH VOLTAGE FLAG BIT
Clear HVF by writing a logic [1] to HVF. If high voltage
condition is still present while writing a logic [1] to HVF, the
writing has no effect. Therefore, a high voltage interrupt
cannot be lost due to inadvertent clearing of HVF. Reset
clears the HVF bit. Writing a logic [0] to HVF has no effect.
OCF — OVER-CURRENT FLAG BIT
Reset clears the OCF bit. To clear this flag, write a logic [1] to
Analog Integrated Circuit Device Data
Freescale Semiconductor
• 1 = High temperature condition has occurred.
• 0 = High temperature condition has not occurred.
This read / write flag is set on a low voltage condition. Clear
• 1 = Low voltage condition has occurred.
• 0 = Low voltage condition has not occurred.
This read / write flag is set on a high voltage condition.
• 1 = High voltage condition has occurred.
• 0 = High voltage condition has not occurred.
This read-only flag is set on an overcurrent condition.
the appropriate overcurrent flag in the SYSSTAT Register.
See
OCF.
INTERRUPT MASK REGISTER (IMR)
LINIE — LIN LINE INTERRUPT ENABLE BIT
LINF. Reset clears the LINIE bit.
Reset
Read
Write
• 1 = High current condition has occurred.
• 0 = High current condition has not occurred.
This read / write bit enables CPU interrupts by the LIN flag,
• 1 = Interrupt requests from LINF flag enabled.
• 0 = Interrupt requests from LINF flag disabled.
Figure
Figure 9. Principal Implementation for OCF
Bit 7
0
0
9, which shows the two signals triggering the
Register Name and Address: IMR - $04
HVDD_OCF
HB_OCF
6
0
0
LINIE
5
0
FUNCTIONAL DEVICE OPERATION
HTIE
4
0
LVIE
3
0
OPERATIONAL MODES
HVIE
OCF
2
0
OCIE
1
0
908E626
Bit 0
0
0
19

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