ADE7169ASTZF16 Analog Devices Inc, ADE7169ASTZF16 Datasheet - Page 124

• Manufacturer Part Number: ADE7169ASTZF16
• Description: IC ENERGY METER 1PHASE 64LQFP
• Manufacturer: Analog Devices Inc

Specifications of ADE7169ASTZF16

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (16 kB)
• Controller Series: ADE71xx
• Ram Size: 512 x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Ic Function: Single Phase Energy Measurement IC
• Supply Voltage Range: 3.13V To 3.46V, 2.4V To 3.7V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADE7169EBZ-2 - BOARD EVALUATION FOR ADE7169F16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
READ AND WRITE OPERATIONS
Writing to the RTC Registers
The RTC circuitry runs off a 32.768 kHz clock. The timekeeping
registers, the hundredths of a second counter SFR (HTHSEC,
Address 0xA2), seconds counter SFR (SEC, Address 0xA3),
minutes counter SFR (MIN, Address 0xA4), and hours counter
SFR (HOUR, Address 0xA5), are updated with a 32.768 kHz
clock. However, the RTC configuration SFR (TIMECON,
Address 0xA1) and alarm interval SFR (INTVAL, Address 0xA6)
are updated with a 128 Hz clock. It takes up to two 128 Hz clock
cycles from when the MCU writes to the TIMECON SFR or
INTVAL SFR until there is a successful update in the RTC.
To protect the RTC timekeeping registers from runaway code,
a key must be written to the Key SFR (KYREG, Address 0xC1),
which is described in Table 126, to obtain write access to the
HTHSEC, SEC, MIN and HOUR SFRs. KYREG should be set to
0xEA to unlock the timekeeping registers and reset to 0 after a
timekeeping register is written to. The RTC registers can be
written to using the following 8052 assembly code:
MOV
CALL
…
UpdateRTC:
Reading the RTC Counter SFRs
The RTC cannot be stopped to read the current time because
stopping the RTC introduces an error in its timekeeping.
Therefore, the RTC is read on the fly, and the counter registers
must be checked for overflow. This can be accomplished
through the following 8052 assembly code:
ReadAgain:
Bank 0
MOV
MOV
MOV
MOV
MOV
MOV
MOV
RET
MOV
MOV
MOV
MOV
MOV
CJNE A, 00h, ReadAgain ; 00h is R0 in
RTCKey,#0EAh
UpdateRTC
KYREG,RTCKey
SEC,#30
KYREG,RTCKey
MIN,#05
KYREG,RTCKey
HOUR,#04
KYREG,#00h
R0,HTHSEC
R1,SEC
R2,MIN
R3,HOUR
A,HTHSEC
; using Bank 0
Rev. B | Page 124 of 152
RTC MODES
The RTC can be configured in a 24-hour mode or a 256-hour
mode. A midnight event is generated when the RTC hour
counter rolls over from 23 to 0 or 255 to 0, depending on
whether the TFH bit is set in the RTC Configuration SFR
(TIMECON, Address 0xA1). The midnight event sets the
MIDNIGHT flag in the TIMECON SFR, and a pending RTC
interrupt is created. The RTC midnight event wakes the 8052
MCU core if the MCU is asleep in PSM2 mode when the
midnight event occurs.
In the 24-hour mode, the midnight event is generated once a
day at midnight. The 24-hour mode is useful for updating a
software calendar to keep track of the current day. The 256-hour
mode results in power savings during extended operation in
PSM2 mode because the MCU core wakes up less frequently.
RTC INTERRUPTS
The RTC midnight interrupt and alarm interrupt are enabled by
setting the ETI bit in the Interrupt Enable and Priority 2 SFR
(IEIP2, Address 0xA9). When a midnight or alarm event
occurs, a pending RTC interrupt is generated. If the RTC
interrupt is enabled, the program vectors to the RTC interrupt
address and the pending interrupt are cleared. If the RTC
interrupt is disabled, the RTC interrupt remains pending until
the RTC interrupt is enabled. The program then vectors to the
RTC interrupt address.
The MIDNIGHT flag and ALARM flag are set when the
midnight event and alarm event occur, respectively. The user
should manage these flags to keep track of which event caused
an RTC interrupt by servicing the event and clearing the
appropriate flag in the RTC interrupt servicing routine.
Note that if the ADE7116/ADE7156/ADE7166/ADE7169/
ADE7566/ADE7569 are awakened by an RTC event, either by
the MIDNIGHT event or an ALARM event, the pending RTC
interrupt must be serviced before the device can go back to
sleep again. The ADE7116/ADE7156/ADE7166/ADE7169/
ADE7566/ADE7569 keep waking up until this interrupt has
been serviced.
Interval Timer Alarm
The RTC can be used as an interval timer. When the interval
timer is enabled by setting the ITEN bit in the RTC Configuration
SFR (TIMECON, Address 0xA1), the interval timer clock source
selected by the ITS1 and ITS0 bits is passed through an 8-bit
counter. This counter increments on every interval timer clock
pulse until it is equal to the value in the alarm interval SFR
(INTVAL, Address 0xA6). Then, an alarm event is generated,
setting the ALARM flag and creating a pending RTC interrupt.
If the SIT bit in the RTC configuration SFR (TIMECON,
Address 0xA1) is cleared, the 8-bit counter is cleared and starts
counting again. If the SIT bit is set, the 8-bit counter is held in
reset after the alarm occurs.