AT43USB320A-AC Atmel, AT43USB320A-AC Datasheet - Page 51

IC USB MCU EMBED HUB AVR 100LQFP

AT43USB320A-AC

Manufacturer Part Number
AT43USB320A-AC
Description
IC USB MCU EMBED HUB AVR 100LQFP
Manufacturer
Atmel
Series
AVR®r
Datasheet

Specifications of AT43USB320A-AC

Applications
USB Hub/Microcontroller
Core Processor
AVR
Controller Series
AT43USB
Ram Size
512 x 8
Interface
SPI Serial, USB, UART
Number Of I /o
32
Voltage - Supply
4.4 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Type
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT43USB320A-AC
Manufacturer:
Atmel
Quantity:
10 000
1443E–USB–4/04
Watchdog Timer Control Register – WDTCR
• Bits 7..5 – Res: Reserved Bits
These bits are reserved bits in the AT43USB320A and will always read as zero.
• Bit 4 – WDTOE: Watch Dog Turn-Off Enable
This bit must be set (one) when the WDE bit is cleared. Otherwise, the watchdog will not be
disabled. Once set, the hardware will clear this bit to zero after four clock cycles. Refer to the
description of the WDE bit for a watchdog disable procedure.
• Bit 3 – WDE: Watch Dog Enable
When the WDE is set (one) the Watchdog Timer is enabled, and if the WDE is cleared (zero)
the Watchdog Timer function is disabled. WDE can only be cleared if the WDTOE bit is set
(one). To disable an enabled watchdog timer, the following procedure must be followed:
1. In the same operation, write a logical one to WDTOE and WDE. A logical one must be
2. Within the next four clock cycles, write a logical 0 to WDE. This disables the watchdog.
• Bits 2..0 – WDP2, WDP1, WDP0: Watch Dog Timer Prescaler 2, 1 and 0
The WDP2, WDP1 and WDP0 bits determine the Watchdog Timer prescaling when the
Watchdog Timer is enabled. The different prescaling values and their corresponding Time-out
Periods are shown in Table 19.
Table 19. Watchdog Timer Prescale Select
Note:
Initial Value
Read/Write
$21 ($41)
WDP2
written to WDE even though it is set to one before the disable operation starts.
Bit
0
0
0
0
1
1
1
1
The WDR (Watchdog Reset) instruction should always be executed before the Watchdog Timer
is enabled. This ensures that the reset period will be in accordance with the Watchdog Timer
prescale settings. If the Watchdog Timer is enabled without reset, the watchdog timer may not
start to count from zero. To avoid unintentional MCU reset, the Watchdog Timer should be dis-
abled or reset before changing the Watchdog Timer Prescale Select.
WDP1
R
7
0
0
0
1
1
0
0
1
1
R
6
0
WDP0
0
1
0
1
0
1
0
1
R
5
0
Number of WDT Oscillator cycles
8K cycles
16K cycles
32K cycles
64K cycles
128K cycles
256K cycles
512K cycles
1,024K cycles
WDTOE
R/W
4
0
WDE
R/W
3
0
WDP2
R/W
2
0
AT43USB320A
WDP1
R/W
1
0
WDP0
R/W
0
0
Time-out
8.2 ms
16.4 ms
33.8 ms
65.6 ms
0.131 s
0.262 s
0.524 s
1.048 s
WDTCR
51

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