CY7C68013-100AXC Cypress Semiconductor Corp, CY7C68013-100AXC Datasheet - Page 46

• Manufacturer Part Number: CY7C68013-100AXC
• Description: IC MCU USB PERIPH HI SPD 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX2LP™r

Specifications of CY7C68013-100AXC

• Applications: USB Microcontroller
• Core Processor: 8051
• Program Memory Type: ROMless
• Controller Series: CY7C680xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 40
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 9-16. Slave FIFO Address to Flags/Data Parameters
9.14
Table 9-17. Slave FIFO Synchronous Address Parameters
9.15
Table 9-18. Slave FIFO Asynchronous Address Parameters
10.0
Table 10-1. Ordering Information
Document #: 38-08012 Rev. *C
t
t
t
t
t
t
t
CY7C68013-128AC
CY7C68013-100AC
CY7C68013-56PVC
CY7C68013-56LFC
CY3681
XFLG
XFD
IFCLK
SFA
FAH
SFA
FAH
Parameter
Parameter
Parameter
Ordering Code
Slave FIFO Synchronous Address
Slave FIFO Asynchronous Address
Ordering Information
FIFOADR[1:0] to FLAGS Output Propagation Delay
FIFOADR[1:0] to FIFODATA Output Propagation Delay
Interface Clock Period
FIFOADR[1:0] to Clock Set-up Time
Clock to FIFOADR[1:0] Hold Time
FIFOADR[1:0] to RD/WR/PKTEND Set-up Time
RD/WR/PKTEND to FIFOADR[1:0] Hold Time
SLCS/FIFOADR [1:0]
SLCS/FIFOADR [1:0]
Figure 9-14. Slave FIFO Asynchronous Address Timing Diagram
RD/WR/PKTEND
Figure 9-13. Slave FIFO Synchronous Address Timing Diagram
128 TQFP
100 TQFP
56 SSOP
56 QFN
EZ-USB FX2 Xcelerator Development Kit
IFCLK
Description
Description
Description
Package Type
t
SFA
[15]
[16]
t
SFA
t
FAH
8K
8K
8K
8K
RAM Size
t
FAH
20.83
Min.
Min.
Min.
25
10
10
10
40
40
24
24
# Prog I/Os
[13]
Max.
Max.
Max.
10.7
14.3
200
CY7C68013
16/8 bit
–
–
–
/Data Busses
Page 46 of 52
Address
8051
Unit
Unit
Unit
ns
ns
ns
ns
ns
ns
ns