PIC16F54-I/SS Microchip Technology, PIC16F54-I/SS Datasheet - Page 9
![IC MCU FLASH 512X12 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F54-I/SS
Manufacturer Part Number
PIC16F54-I/SS
Description
IC MCU FLASH 512X12 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F54-ISS.pdf
(88 pages)
2.PIC16F54-ISS.pdf
(14 pages)
3.PIC16F57-ISO.pdf
(86 pages)
Specifications of PIC16F54-I/SS
Core Size
8-Bit
Program Memory Size
768B (512 x 12)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
12
Program Memory Type
FLASH
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Controller Family/series
PIC16F
No. Of I/o's
12
Ram Memory Size
25Byte
Cpu Speed
20MHz
No. Of Timers
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164307 - MODULE SKT FOR PM3 28SSOPAC164014 - MODULE SKT PROMATEII 44PQFP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F54-I/SS
Manufacturer:
MIC
Quantity:
20 000
2.0
The high performance of the PIC16F5X family can be
attributed to a number of architectural features
commonly found in RISC microprocessors. To begin
with, the PIC16F5X uses a Harvard architecture in
which program and data are accessed on separate
buses. This improves bandwidth over traditional von
Neumann architecture where program and data are
fetched on the same bus. Separating program and data
memory further allows instructions to be sized differ-
ently than the 8-bit wide data word. Instruction opcodes
are 12-bits wide, making it possible to have all single-
word instructions. A 12-bit wide program memory
access bus fetches a 12-bit instruction in a single cycle.
A two-stage pipeline overlaps fetch and execution of
instructions. Consequently, all instructions (33) execute
in a single cycle except for program branches.
The PIC16F54 addresses 512 x 12 of program
memory, the PIC16F57 and PIC16F59 addresses
2048 x 12 of program memory. All program memory is
internal.
The PIC16F5X can directly or indirectly address its
register files and data memory. All Special Function
Registers (SFR), including the program counter, are
mapped in the data memory. The PIC16F5X has a
highly orthogonal (symmetrical) instruction set that
makes it possible to carry out any operation on any reg-
ister using any Addressing mode. This symmetrical
nature and lack of ‘special optimal situations’ make pro-
gramming with the PIC16F5X simple, yet efficient. In
addition, the learning curve is reduced significantly.
© 2007 Microchip Technology Inc.
ARCHITECTURAL OVERVIEW
The PIC16F5X device contains an 8-bit ALU and work-
ing register. The ALU is a general purpose arithmetic
unit. It performs arithmetic and Boolean functions
between data in the working register and any register
file.
The ALU is 8-bits wide and capable of addition,
subtraction, shift and logical operations. Unless other-
wise mentioned, arithmetic operations are two's
complement in nature. In two-operand instructions,
typically one operand is the W (working) register. The
other operand is either a file register or an immediate
constant. In single operand instructions, the operand is
either the W register or a file register.
The W register is an 8-bit working register used for ALU
operations. It is not an addressable register.
Depending on the instruction executed, the ALU may
affect the values of the Carry (C), Digit Carry (DC) and
Zero (Z) bits in the STATUS Register. The C and DC
bits operate as a borrow and digit borrow out bit,
respectively, in subtraction. See the SUBWF and ADDWF
instructions for examples.
A simplified block diagram is shown in Figure 2-1 with
the corresponding device pins described in Table 2-1
(for PIC16F54), Table 2-2 (for PIC16F57) and
Table 2-3 (for PIC16F59).
PIC16F5X
DS41213D-page 7