20-668-0011 Rabbit Semiconductor, 20-668-0011 Datasheet - Page 190
20-668-0011
Manufacturer Part Number
20-668-0011
Description
IC MPU RABIT3000A 55.5MHZ128LQFP
Manufacturer
Rabbit Semiconductor
Datasheet
1.20-668-0011.pdf
(312 pages)
Specifications of 20-668-0011
Processor Type
Rabbit 3000 8-Bit
Speed
55.5MHz
Voltage
2.5V, 2.7V, 3V, 3.3V
Mounting Type
Surface Mount
Package / Case
128-LQFP
Data Bus Width
8 bit
Maximum Clock Frequency
55.5 MHz
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Number Of Programmable I/os
56
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
316-1061
Available stocks
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Manufacturer
Quantity
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Company:
Part Number:
20-668-0011
Manufacturer:
Rabbit Semiconductor
Quantity:
10 000
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21.2 Dependencies
21.2.1 I/O Pins
Each Quadrature Decoder channel can accept the two encoder inputs from one of three
different locations, as shown in the table below. Each channel can select a different input
option. Note that these pins can be used for other peripherals at the same time as the
Quadrature Decoder peripheral; one example of this use is to use measure pulse width on
the I channels with the Input Capture peripheral.
21.2.2 Clocks
The 8/10-bit Quadrature Decoder counters are clocked from the output of Timer A10, and
can run at rates from the peripheral clock divided by 2 down to the peripheral clock
divided by 512 by writing the appropriate value to TAT10R. The clock rate must be high
enough that transitions on the inputs are sampled in different clock cycles. In addition,
both the I and Q inputs go through a digital filter that rejects pulses shorter than two clock
periods wide.
21.2.3 Other Registers
21.2.4 Interrupts
Each Quadrature Decoder channel can generate an interrupt whenever the counter incre-
ments from 0x0FF (0x3FF in 10-bit mode) to 0x00 or when the counter decrements from
0x000 to 0x0FF (0x3FF for 10-bit mode). The interrupt request is cleared when QDCSR is
read.
The Quadrature Decoder interrupt vector is in the IIR at offset 0x190. It can be set as
Priority 1, 2, or 3.
The status bits in the QDCSR are set coincident with the interrupt request and are reset
when QDCSR is read.
180
TAT10R
Register
Option 1
Option 2
Inputs
Time constant for Quadrature Decoder clock
PF1
PF5
Channel 1
I
PF0
PF4
Q
Rabbit 3000 Microprocessor User’s Manual
Function
PF3
PF7
Channel 2
I
PF2
PF6
Q
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