MPC852TCVR50A Freescale Semiconductor, MPC852TCVR50A Datasheet - Page 40

• Manufacturer Part Number: MPC852TCVR50A
• Description: IC MPU POWERQUICC 50MHZ 256PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC Ir

Specifications of MPC852TCVR50A

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 50MHz
• Voltage: 1.8V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 50MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.9/3.465V
• Operating Supply Voltage (min): 1.7/3.135V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: BGA
• Core Size: 32 Bit
• Program Memory Size: 8KB
• Cpu Speed: 50MHz
• Embedded Interface Type: SPI, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 256
• Supply Voltage Range: 1.7V To 1.9V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Bus Signal Timing
Table 14
40
Num
J82
J83
J84
J85
J86
J87
J88
J89
J90
J91
J92
J93
J94
J95
CLKOUT to HRESET high impedance
(MAX = 0.00 × B1 + 20.00)
CLKOUT to SRESET high impedance
(MAX = 0.00 × B1 + 20.00)
RSTCONF pulse width (MIN = 17.00 × B1) 515.20
—
Configuration data to HRESET rising edge
set up time (MIN = 15.00 × B1 + 50.00)
Configuration data to RSTCONF rising
edge set up time
(MIN = 0.00 × B1 + 350.00)
Configuration data hold time after
RSTCONF negation
(MIN = 0.00 × B1 + 0.00)
Configuration data hold time after
HRESET negation
(MIN = 0.00 × B1 + 0.00)
HRESET and RSTCONF asserted to data
out drive (MAX = 0.00 × B1 + 25.00)
RSTCONF negated to data out high
impedance. (MAX = 0.00 × B1 + 25.00)
CLKOUT of last rising edge before chip
three-states HRESET to data out high
impedance. (MAX = 0.00 × B1 + 25.00)
DSDI, DSCK set up (MIN = 3.00 × B1)
DSDI, DSCK hold time
(MIN = 0.00 × B1 + 0.00)
SRESET negated to CLKOUT rising edge
for DSDI and DSCK sample
(MIN = 8.00 × B1)
shows the reset timing for the MPC852T.
Characteristic
MPC852T PowerQUICC™ Hardware Specifications, Rev. 4
Table 14. Reset Timing
504.50
350.00
242.40
90.90
0.00
0.00
0.00
Min
—
—
—
—
—
—
33 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
425.00
425.00
350.00
200.00
75.00
0.00
0.00
0.00
Min
—
—
—
—
—
—
40 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
340.00
350.00
350.00
160.00
60.00
0.00
0.00
0.00
Min
—
—
—
—
—
—
50 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
Freescale Semiconductor
257.60
277.30
350.00
121.20
45.50
0.00
0.00
0.00
Min
—
—
—
—
—
—
66 MHz
20.00
20.00
25.00
25.00
25.00
Max
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns