XS1-L02A-QF124-C4 XMOS, XS1-L02A-QF124-C4 Datasheet - Page 33
![IC MPU 32BIT DUAL CORE 124QFN](/photos/28/18/281888/xs1-l02a-qf124-c4_sml.jpg)
XS1-L02A-QF124-C4
Manufacturer Part Number
XS1-L02A-QF124-C4
Description
IC MPU 32BIT DUAL CORE 124QFN
Manufacturer
XMOS
Specifications of XS1-L02A-QF124-C4
Processor Type
XCore 32-Bit
Speed
400MHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
124-TFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
880-1004
XS1-L02-FB144-C4
XS1-L02-FB144-C4
XMOS
32/40
7 Free running oscillators
There are four free-running oscillators on the XS1-L. These free-running oscilla-
tors are designed to operate at different frequencies. The oscillators clock four
counters. The counters and oscillators are controlled using a processor status
register (using SETPS on register 6). The counter values can be read using four
separate processor status registers (using GETPS on registers 7-10).
Oscillators can be enabled (started) by writing a ’1’ into the appropriate enable
bit. The oscillator is disabled (stopped) by writing a ’0’. Oscillators are disabled
on a system-reset.
Counters can be cleared by writing a ’1’ into the appropriate control-bit. Counters
are not cleared on system-reset, but keep their old state. Counters can be read
by reading one of the four counter registers. Counters should only be read when
the associated oscillator is stopped.
XS1-L S
S
(0.9)
2008/08/25
YSTEM
PECIFICATION