MPC8308CVMAFD Freescale Semiconductor, MPC8308CVMAFD Datasheet - Page 26

• Manufacturer Part Number: MPC8308CVMAFD
• Description: MPU POWERQUICC II PRO 473MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8308CVMAFD

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 333MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 473-MAPBGA
• Product: Network Processor
• Data Rate: 256 bps
• Frequency: 333 MHz
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current (max): 5 uA
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Interface: I2C, JTAG, SPI
• Mounting Style: SMD/SMT
• Core Size: 32 Bit
• Cpu Speed: 333MHz
• Digital Ic Case Style: MAPBGA
• No. Of Pins: 473
• Operating Temperature Range: -40°C To +105°C
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

High-Speed Serial Interfaces (HSSI)
To illustrate these definitions using real values, consider the case of a current mode logic (CML)
transmitter that has a common mode voltage of 2.25 V and each of its outputs, TD and TD, has a swing
that goes between 2.5 V and 2.0 V. Using these values, the peak-to-peak voltage swing of each signal (TD
or TD) is 500 mV p-p, which is referred as the single-ended swing for each signal. In this example, since
the differential signaling environment is fully symmetrical, the transmitter output’s differential swing
(V
between 500 mV and –500 mV, in other words, V
phase. The peak differential voltage (V
is 1000 mV p-p.
10.2
The SerDes reference clock inputs are applied to an internal PLL whose output creates the clock used by
the corresponding SerDes lanes. The SerDes reference clocks input is SD_REF_CLK and SD_REF_CLK
for PCI Express.
The following sections describe the SerDes reference clock requirements and some application
information.
26
OD
•
) has the same amplitude as each signal’s single-ended swing. The differential output signal ranges
A Volts
B Volts
Common Mode Voltage, V
The common mode voltage is equal to one-half of the sum of the voltages between each conductor
of a balanced interchange circuit and ground. In this example, for SerDes output,
V
output voltages within a differential pair. In a system, the common mode voltage may often differ
from one component’s output to the other’s input. Sometimes, it may be even different between the
receiver input and driver output circuits within the same component. It is also referred as the DC
offset in some occasion.
cm_out
SerDes Reference Clocks
= (V
Figure 15. Differential Voltage Definitions for Transmitter or Receiver
TXn
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
TX n or RX n
TX n or RX n
+ V
TXn
)/2 = (A + B) / 2, which is the arithmetic mean of the two complimentary
Differential Peak-Peak Voltage, V
cm
DIFFp
Differential Swing, V
Differential Peak Voltage, V
) is 500 mV. The peak-to-peak differential voltage (V
OD
is 500 mV in one phase and –500 mV in the other
ID
or V
DIFFpp
OD
DIFFp
= 2*V
= A – B
= |A – B|
DIFFp
(not shown)
Freescale Semiconductor
V
cm
= (A + B) / 2
DIFFp-p
)