MPC8247VRMIBA Freescale Semiconductor, MPC8247VRMIBA Datasheet - Page 4

IC MPU POWERQUICC II 516-PBGA

MPC8247VRMIBA

Manufacturer Part Number
MPC8247VRMIBA
Description
IC MPU POWERQUICC II 516-PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheet

Specifications of MPC8247VRMIBA

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
266MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
516-PBGA
Family Name
MPC82XX
Device Core
PowerQUICC II
Device Core Size
32b
Frequency (max)
266MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
516
Package Type
TEPBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
266 MHz
Operating Supply Voltage
1.4 V to 1.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
4 KB
I/o Voltage
3.3 V
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
14
Program Memory Size
16 KB
Program Memory Type
EEPROM
Core Size
32 Bit
Cpu Speed
266MHz
Digital Ic Case Style
BGA
No. Of Pins
516
Supply Voltage Range
1.425V To 1.575V
Rohs Compliant
Yes
For Use With
CWH-PPC-8248N-VE - KIT EVAL SYSTEM QUICCSTART 8248
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Overview
4
— Floating-point unit (FPU) supports floating-point arithmetic
— Support for cache locking
Low-power consumption
Separate power supply for internal logic (1.5 V) and for I/O (3.3 V)
Separate PLLs for G2_LE core and for the communications processor module (CPM)
— G2_LE core and CPM can run at different frequencies for power/performance optimization
— Internal core/bus clock multiplier that provides 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 4.5:1, 5:1, 5.5:1, 6:1,
— Internal CPM/bus clock multiplier that provides 2:1, 2.5:1, 3:1, 3.5:1, 4:1, 5:1, 6:1 ,and 8:1
64-bit data and 32-bit address 60x bus
— Bus supports multiple master designs—up to two external masters
— Supports single transfers and burst transfers
— 64-, 32-, 16-, and 8-bit port sizes controlled by on-chip memory controller
60x-to-PCI bridge
— Programmable host bridge and agent
— 32-bit data bus, 66 MHz, 3.3 V
— Synchronous and asynchronous 60x and PCI clock modes
— All internal address space available to external PCI host
— DMA for memory block transfers
— PCI-to-60x address remapping
System interface unit (SIU)
— Clock synthesizer
— Reset controller
— Real-time clock (RTC) register
— Periodic interrupt timer
— Hardware bus monitor and software watchdog timer
— IEEE 1149.1 JTAG test access port
Eight bank memory controller
— Glueless interface to SRAM, page mode SDRAM, DRAM, EPROM, Flash, and other
— Byte write enables
— 32-bit address decodes with programmable bank size
— Three user programmable machines, general-purpose chip-select machine, and page mode
— Byte selects for 64-bit bus width (60x)
— Dedicated interface logic for SDRAM
Disable CPU mode
7:1, and 8:1 ratios
ratios
user-definable peripherals
pipeline SDRAM machine
MPC8272 PowerQUICC II™ Family Hardware Specifications, Rev. 2
Freescale Semiconductor

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