MPC855TVR80D4 Freescale Semiconductor, MPC855TVR80D4 Datasheet
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MPC855TVR80D4
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MPC855TVR80D4 Summary of contents
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... Freescale Semiconductor, Inc. Advance Information MPC855TTS/D Rev. 0.1, 11/2001 MPC855T Communications Controller Technical Summary The MPC855T communications controller is a member of the MPC8xx family targeted at cost sensitive general purpose networking controller applications. The MPC855T can be used in a variety of controller applications, excelling particularly in low cost communications and networking products, such as SOHO routers, ADSL, and cable modems. The MPC855T integrates three separate processing blocks. The fi ...
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... Freescale Semiconductor, Inc. MPC855T Key Features above) — Large on-chip transmit and receive FIFOs to support a variety of bus latencies — Retransmission from transmit FIFO following a collision — Automatic internal flushing of the receive FIFO for runts and collisions — Off-chip buffer descriptor rings of user-definable size that allow nearly unlimited flexibility in management of transmit and receive buffer memory • ...
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... Freescale Semiconductor, Inc. – Transmission convergence (TC) function for T1/E1/ADSL lines – Cell delineation – Cell payload scrambling/descrambling – Automatic idle/unassigned cell insertion/stripping – Header error control (HEC) generation, checking, and statistics – Glueless interface to Motorola CopperGold ADSL transceiver — Receive VP/VC connection lookup mechanisms, including: – ...
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... Freescale Semiconductor, Inc. MPC855T Key Features fixed-point registers – Embedded MPC8xx core performs branch folding and branch prediction with conditional prefetch, but without conditional execution – 4-Kbyte data cache and 4-Kbyte instruction cache, each with an MMU – Instruction and data caches are two-way, set associative, physical address, 4-word line burst, least recently used (LRU) replacement, lockable on cache line granularity – ...
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... Freescale Semiconductor, Inc. – Gate mode can enable/disable counting – Interrupt may be masked on reference match and event capture — Interrupts – Seven external interrupt request (IRQ) lines – 12 port pins with interrupt capability – 13 internal interrupt sources – Programmable highest priority request — ...
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... Freescale Semiconductor, Inc. MPC855T Key Features — QMC multichannel features – independent communication channels on a single SCC – Arbitrary mapping of 0–31 channels to any of 0–31 TDM time slots – Supports either transparent or HDLC protocols for each channel – Independent transmit and receive buffer descriptors and event/interrupt reporting for each channel — ...
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... Freescale Semiconductor, Inc. — 3.3-V operation (No support for 5V I/O) — 357-pin ball grid array (BGA) package 1.2 MPC855T Architecture Overview The MPC855T is comprised of four modules connected to the 32-bit internal bus: the embedded MPC8xx core, the system integration unit (SIU), the communications processor module (CPM), and the Fast Ethernet controller (FEC) ...
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... Freescale Semiconductor, Inc. MPC855T Architecture Overview branch prediction with conditional prefetch, but without conditional execution. The embedded core can operate on 32-bit external operands with one bus cycle. The integer unit supports 32- x 32-bit fixed-point general-purpose registers. It can execute one integer instruction each clock cycle. Each element in the integer unit is clocked only when valid data is present in the data queue ready for operation ...
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... Freescale Semiconductor, Inc. Independent transmit and receive buffer descriptor rings located in external memory allow nearly unlimited flexibility in memory management of transmit and receive data frames. Locating buffer descriptors in external memory has two advantages—first, external memory (i.e., DRAM) is low cost; secondly, descriptor rings in external memory have no inherent size limitations, allowing the memory management to be optimized according to specifi ...
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... Freescale Semiconductor, Inc. ATM Support • Ten independent serial DMA (SDMA) controllers • Four general-purpose timers The CPM provides the communications features. Included are a communications processor, one serial communications controller (SCC), two serial management controllers (SMC), one serial peripheral interface (SPI), one I2C Interface, 8 Kbytes of dual-port RAM, an interrupt controller, a time slot assigner, ...
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... Freescale Semiconductor, Inc. connection to higher-speed UTOPIA connections (e.g. 155 Mbps), an external FIFO will be required, and the time-average of the bandwidth processed by the 855T must be less than 70 Mbps. Serial-mode ATM can be performed over the SCC for a byte-aligned serial stream only. This means that an indication of a byte boundary in the serial stream must be given to the 855T SCC ...
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... Freescale Semiconductor, Inc. Glueless System Design MPC855T CS0 OE Data Address CS7 WE[3–0] RAS2 RAS1 CAS[3–0] PRTY[3–0] Figure 2. MPC855T System Configuration Figure 3 shows the glueless connection of the MPC855T serial channels to physical layer framers and transceivers. 12 MPC855T Communications Controller Technical Summary ...
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... Freescale Semiconductor, Inc. 10/100 Base-T Transceiver 10 BASE-T Transceiver RS-232 Transceiver Figure 3. MPC855T Serial Configuration 1.6 Ordering Information The packages and operating frequencies available for the MPC855T are identified below. Package Type Ball grid array (ZP suffix) Ball grid array (CZP suffix) ...
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... Freescale Semiconductor, Inc. Ordering Information For additional information, see the documents listed below. Document Title QMC Supplement to MC68360 and MPC860 User’s Manuals Programming Environments Manual for 32-Bit Implementations of the PowerPC Architecture Note: These documents are available at www.motorola.com. Revision 0 0.1 14 MPC855T Communications Controller Technical Summary ...
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... DOCUMENT COMMENTS: FAX (512) 933-2625, Attn: RISC Applications Engineering Freescale Semiconductor, Inc. Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. ...