MPC8572EAMC Freescale Semiconductor, MPC8572EAMC Datasheet
MPC8572EAMC
Specifications of MPC8572EAMC
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MPC8572EAMC Summary of contents
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... Advanced Mezzanine Card MPC8572EAMC User Guide MPC8572EAMCUG Rev. 1.2 11/2008 ...
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... Fax: +1-303-675-2150 LDCForFreescaleSemiconductor @hibbertgroup.com Document Number: MPC8572EAMCUG Rev. 1.2, 11/2008 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. ...
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... MPC8572E Microprocessor Block.................................................................................. 5-1 5.1.1 MPC8572E DDR Memory .......................................................................................... 5-1 5.1.1.1 DDR Groups ............................................................................................................ 5-3 5.1.1.2 Terminations and I/O Voltage .................................................................................. 5-3 5.1.2 Serial RapidIO Interface .............................................................................................. 5-4 MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor Contents Title Contents Chapter 1 General Information Chapter 2 Chapter 3 ...
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... MMC UART.......................................................................................................... 5-41 5.6.1.10 BDM Debug Header .............................................................................................. 5-41 5.6.1.11 Persistent Store ...................................................................................................... 5-41 5.6.2 MMC User Operation ................................................................................................ 5-41 5.6.2.1 Hot Swapping ........................................................................................................ 5-41 5.6.2.2 UART Terminal ..................................................................................................... 5-42 5.6.2.3 FRU records........................................................................................................... 5-42 MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 iv Contents Title Page Number Freescale Semiconductor ...
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... Paragraph Number 5.7 Thermal Requirements................................................................................................... 5-46 MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor Contents Title Appendix A Revision History Page Number v ...
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... Paragraph Number MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 vi Contents Title Page Number Freescale Semiconductor ...
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... AdvancedMC ports 4–7 (PCI-Express functionality is mutually exclusive with Serial RapidIO functionality on AdvancedMC ports 4–7). 1.2 Working Configuration There is one configuration for use with the MPC8572EAMC board, which is system development in an AdvancedMC-compatible chassis. 1.2.1 System Development Configuration The recommended procedure when configuring the MPC8572EAMC is to run the card using an ATCA, MicroTCA, picoTCA or equivalent chassis ...
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... Fast Ethernet controller maintenance interface – 2x DDR2/DDR3 SDRAM memory controllers, one per core – 3x PCI Express controllers – 1x Serial RapidIO controller with RapidIO messaging unit – 2x UART – Local Bus Controller MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 1-2 Freescale Semiconductor ...
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... Chained JTAG header for Reset/System CPLDs – 16-pin COP header for processor debug 1.3.1 External Connectors The MPC8572EAMC interconnects with external devices via the following set of connectors • Front Panel, Dual Ethernet Connector (for Eth0/1—GigEth) (P3) • Front Panel, Single Ethernet Connector (for Eth4—FEC) (P1) • ...
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... General Information Figure 1-1. MPC8572EAMC Board Front Panel Connections Users should note that the MPC8572EAMC is shipped with the “U-Boot” bootloader and a Linux Kernel already programmed into the FLASH memory. The Linux kernel uses the ETH0–4 notation, whereas eTSEC1–4 and FEC is the notation used by U-boot ...
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... Figure 1-2. MPC8572EAMC Board External Connections MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor General Information 1-5 ...
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... AdvancedMC Advanced mezzanine card ATCA BDM CPLD DIP DNP DSP DUART MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 1-6 Figure 1-3. MPC8572EAMC Block Diagram Definition Advanced telecommunications computing platform Background debugging mode Complex programmable logic device Dual in-line package Do not populate ...
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... Power requirements No external power supply for AdvancedMC modes—powered from ATCA carrier/uTCA chassis. Operating temperature Storage temperature – MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor Definition Electrically erasable programmable read-only memory Gigabit Ethernet Hardware Inter-IC bus Module management controller ...
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... EEPROM DDRII Communication ports Gigabit Ethernet Fast Ethernet Serial RapidIO PCI-Express UART MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 1-8 Specifications Table 1-3. Processing Support Specifications Dual cores running up to 1.5 GHz x32 128-Mbyte 2 Gbytes, 32-bit wide DDR2 (up to 800 MHz) (2 × 1 Gbyte SoCDIMMS) SGMII GigE SERDES from MPC8572E to front and back panels ...
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... Save packing material for storing and reshipping of equipment 2.2 Installation Instructions Perform the following steps in the order listed to install the MPC8572EAMC Processor Board properly. 1. Verify that jumpers and switches are in their default positions (See Indicators,” for a list of default positions). 2. Connect external cables in accordance with your needs (See for more details) ...
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... Pressing the front panel reset button SW3 resets the board and starts the reset sequence. 12. Pressing the reset button SW2 power-cycles the board and starts the reset sequence. 13. Operate the CodeWarrior IDE software to verify that the board is installed properly MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 2-2 Freescale Semiconductor ...
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... Chapter 3 Memory Map The MPC8572EAMC is shipped with the following memory map as described in Base Address 0x0000_0000 0x4000_0000 0x8000_0000 0xC000_0000 0xF800_0000 0xFFC0_0000 0xFFE0_0000 MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor Table 3-1. MPC8572EAMC Memory Map Device DDR Controller 1 (64-bit) DDR Controller 2 (64-bit) ...
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... Memory Map MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 3-2 Freescale Semiconductor ...
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... Chapter 4 Controls and Indicators This chapter describes the controls and indicators for the MPC8572EAMC processor board, which includes switches, jumpers, LEDs, and push button switches, shown in Figure 4-1. MPC8572EAMC—Switches, Jumpers, LEDs and Push Buttons MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 ...
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... Clock Ratio = 8:1 DDRCLK (533 MHz) SW500.3 OFF [SW500.1:3]=ON:ON:OFF.DDR Clock Ratio = 10:1 DDRCLK (666 MHz) [SW500.1:3]=OFF:ON:OFF.DDR Clock Ratio = 12:1 DDRCLK (800 MHz) [SW500.1:3]=ON:OFF:OFF. RESERVED [SW500.1:3]=OFF:OFF:OFF.DDR Clock Ratio = SYNCHRONOUS MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 4-2 Comments SW4 1 SW5 1 ...
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... Position 1-2: only Reset CPLD is in the chain • Position 2-3: both Reset and System CPLDs are in the chain. Note: If the Reset CPLD is blank, then position 1-2 must be used to program it. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor Comments ...
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... Controls and Indicators 4.3 LEDs Table 4-3 describes the functions of the LEDs on the MPC8572EAMC Processor Board. The physical locations of the LEDs are shown in Description MMC red LED MMC card power blue LED Port 0 AMC SERDES Ethernet Rx activity Port 0 AMC SERDES Ethernet Tx activity ...
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... Headers The MPC8572EAMC Processor Board has a number of headers used to connect a serial terminal to the module management controller. An additional IEEE 1588 test interface header is also provided. These are detailed in Table 4-4. Header J2 MMC serial interface header • Pin1: Serial transmit data output (TxD) • ...
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... Controls and Indicators MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 4-6 Freescale Semiconductor ...
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... USB front panel socket that connects to a dual UART-USB transceiver chip. On the local bus of the MPC8572E is located a 128-Mbyte FLASH memory, which is used to store the operating and file systems for the MPC8572EAMC. This FLASH can be programmed directly using debugging tools, such as CodeWarrior, through the MPC8572E microprocessor. ...
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... DDR SDRAM D2_MCS1 DDR SDRAM D2_MCS2-3 Unused Figure 5-1 illustrates how the DDR controller interfaces on the MPC8572E device and provides a glueless connection to the two 128-Mbit × 72 SoCDIMMs on the MPC8572EAMC. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-2 Table 5-1. Address 0x00000000 ...
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... VREF pin) and the MPC8572E (at pin MVREF). The DDR2 interface on the MPC8572E has the addition of the On-Die Termination (ODT) signals. ODT signals are used to control the termination of the data group signals in the DDRII DRAM device. DDR2 MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor 5-2. ...
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... Option A position (PCI-Express on AdvancedMC ports 4–7) to Option B position (serial RapidIO on AdvancedMC ports 4–7). Figure 5-2 board. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-4 shows the position of these resistors on the MPC8572EAMC Figure 5-2. Setting SERDES Option A/B Freescale Semiconductor ...
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... The interface can work mode and is selectable via user DIP switches during the POR configuration phase. Table 5-3 MPC8572EAMC’s fabric port region. Table 5-3. Serial RapidIO/PCI-Express Board Options MPC8572EAMC Port # MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor illustrates the possible peripheral combinations that are possible on the Option A 4 PCI-Express x4 ...
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... AdvancedMC edge connector, and how they relate to the SERDES resistor options. In order for serial RapidIO to co-exist with PCI-Express functionality on the MPC8572EAMC, two SERDES clock rates must be supported: 100 MHz for PCI-Express and 1.25/2.5 Gbps Serial RapidIO, and 125 MHz for 3 ...
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... PCI-Express uses Port 8–11 onto which the Serial RapidIO is connected. Therefore, x8 PCI-Express is not a supported option. See RapidIO connections. Figure 5-4 microprocessor and the AdvancedMC edge connector. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor Table 5-2 illustrates how the PCI-Express is connected to the MPC8572E Figure 5-4. PCI-Express Connectivity ...
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... LCS1–7 Unused On the MPC8572EAMC, the MPC8572E’s 32-bit local bus is used to connect to 128 Mbytes of FLASH memory. This is physically implemented using two AMD S29GL512N Flash devices. In order to minimize the pin count on the MPC8572E device, both the address and data pins are multiplexed. Two SN74ALVCH32973 devices are used on the MPC8572EAMC to both buffer and de-multiplex the MPC8572E local address/data bus signals onto a dedicated address bus and dedicated 32-bit data bus ...
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... PIC itself. The PIC has twelve interrupt request lines INT[0–11]. The polarity and sense of each of these signals is programmable, with each being capable of being driven completely asynchronously. board. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor Table 5-5 details the interrupt usage on the MPC8572EAMC Table 5-5 ...
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... UART-USB serial connection is implemented on this design. (The #DEVID signal on the Mini-Type B USB connector is connected to a test point for debug purposes). The USB/UART circuitry uses +5 V power generated within the MPC8572EAMC, and not that taken from the external +5 V device/supply. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-10 ...
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... Hard Reset. The MPC8572E’s hard reset signal Connect 15 CHK_STP_OUT# Check Stop Out. This pin is pulled up to 3.3 V via resistor. 16 GND Digital ground MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor Table 5-6. COP/JTAG Interface Signals Description MPC8572EAMC Functional Description 5-11 ...
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... The MPC8572E’s COP/JTAG interface can be accessed via a dedicated 16-pin header on the card itself. Figure 5-7 illustrates the connection between the AdvancedMC connector, Reset CPLD, 16-pin JTAG header, and the MPC8572E. Figure 5-7. COP/JTAG Connectivity MPC8572EAMC MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-12 Freescale Semiconductor ...
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... The master reset signal is generated locally on-board from the reset circuitry, controlled by the System CPLD, as shown in All of the POR configuration signals are handled via System CPLD control. Some of the MPC8572EAMC signals are changeable via a set of DIP switches, whereas others are physically hard-wired on the board to minimize board space ...
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... Protocol TSEC2_TXD[0], TSEC2_TXD[7] (cfg_tsec2_prtcl[0:1]) eTSEC3 Protocol TSEC3_TXD[0], TSEC3_TXD[1] (cfg_tsec3_prtcl[0:1]) eTSEC4 Protocol TSEC4_TXD[0], TSEC4_TXD[1] (cfg_tsec4_prtcl[0:1]) MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-14 Chip Board Board Setup Description Default Setting 111 111 MPC8572E is root complex/ Host processor for all interfaces ...
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... SerDes1 Enable TSEC2_TXD[5] (cfg_srds1_en) SGMII SerDes UART_RTS[1] Enable (cfg_srds_sgmii_en) Engineering Use MSRCID[0], MSRCID[1] POR Configuration (cfg_eng_use[0], cfg_eng_use[1]) MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor MPC8572EAMC Functional Description Chip Board Board Setup Description Default Setting None 000 Automatically configurable as host or slave device ID via System CPLD logic ...
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... MPC8572EAMC. As shown in 88E1112 devices are used to provide the physical interfaces for the SGMII front panel Ethernet connectivity on the MPC8572EAMC board using eTSEC1 and eTSEC2. A further two 88E1112 devices are used to generate SGMII Ethernet functionality on the ports 0 and 1 of the rear AdvancedMC edge connector using eTSEC3 and eTSEC4 on the MPC8572E ...
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... At power up, these configuration pins can be tied to VSS, VDDO or STATUS[1:0] in order to drive the correct configuration state. Table 5-9 Table 5-9. 88E1112 Pin Configuration Values Table 5-10 shows the configuration settings for all four 88E1112 PHYs on the MPC8572EAMC. Table 5-10. 88E1112 Reset Configuration Settings Config Configuration Config_0 ...
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... SGMII copper interfaces, and eTSEC3 and eTSEC4 are both configured as an SGMII fiber interface. The last Ethernet interface used on the MPC8572EAMC is generated using Marvell’s 88E3018 PHY. Using hardware configuration pins, this 10/100BaseT PHY is configured in much the same way as the 88E1112 PHYs that have just been discussed ...
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... Clocking All clocks used on the MPC8572EAMC are generated locally using crystal oscillators. The only exception is the PCI-Express clock, which can be generated either locally (using a 100-MHz crystal oscillator), or externally using the FCLKA input pins (pins 80 and 81 on the AdvancedMC connector). This clock selection is controlled via the System CPLD logic ...
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... A 16-MHz crystal is used to produce the RTC clock input. configured on the MPC8572EAMC. Users should note that the 16-MHz crystal oscillator is not populated on the MPC8572EAMC. The real time clock can either be used locally on board (by populating the 16-MHz crystal), or the System CPLD logic can be programmed to allow the RTC to drive the RTC externally onto one of the AdvancedMC clock pins (such as FCLKA/TCLKA-D) ...
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... SGMII Gigabit Ethernet PHY Clocks The MPC8572EAMC has four SGMII Gigabit Ethernet interfaces. In order to minimize on PCB floor space, a single 25-MHz crystal is fed into an IDT ICS524, low skew 1:4 clock buffer. This is illustrated in Figure 5-13. Figure 5-13. SGMII Ethernet Clock Configuration 5 ...
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... The AdvancedMC specification dictates that two types of optional clock sources are provided to/from the board: four Telecom clocks and one Fabric clock. The MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-22 illustrates how the ICS854054 fan-out buffer connects to the three Table 5-14 ...
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... All of the required voltages for the card are generated locally on board from these 12 V and 3.3 V power supplies. Several smaller power modules use this 12 V intermediate bus to generate the required voltages. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor Figure 5-17 ...
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... MPC8572EAMC Functional Description 5.4.1.1 MPC8572EAMC Voltage Requirements The MPC8572EAMC has a number of on-board peripheral chips, each with its own voltage and power requirements. To determine a safe power budget for the MPC8572EAMC, the power characteristics of each device must be determined. MPC8572EAMC and their individual voltage/power requirements. ...
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... Power Supply Distribution Figure 5-18 shows the power distribution used on the MPC8572EAMC. Figure 5-18. MPC8572EAMC Power Distribution The board receives IPMCV (3.3 V and ground from the AdvancedMC edge connector. The fed to three DC-DC power modules. Two Power-One modules separately generate the 1.1 V core and 3 ...
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... VDD, AVDD_n, BVDD, SCOREVDD, LVDD, TVDD, XVDD, OVDD 2. GVDD All supplies must be at their stable values within 50 ms. Correct power rail sequencing is achieved by via CPLD control. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-26 Vout (V) Trim Resistor (kΩ) Trim Resistor Standard Value (kΩ) Vout Actual (V) 3.3 3.122 kΩ ...
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... MPC8572EAMC Board Headers The MPC8572EAMC has a number of headers placed on the board for debug, control, IO and peripheral functions such as fan cooling and power etc. Header 1 is the COP/JTAG interface used for debug and control of the main MPC8572E processor. Table 5-17. J6—MPC8572E COP/JTAG Interface ...
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... Logical AND of PST0 ... PST3 core status signals. Allows a debugger to know whether the core is running or halted. 15 CF_ALLPST Logical AND of PST0 ... PST3 core status signals. Allows a debugger to know whether the core is running or halted Connect MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-28 Description Table 5-19. J1—MCF5213 BDM Interface Description Freescale Semiconductor ...
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... CPLD from the AdvancedMC JTAG chain. Pin # 5.4.2 Board CPLD Logic/POR Configuration The Reset CPLD is a critical component on the MPC8572EAMC design. This device is responsible for providing the following functions: • Generating a board reset signal • Synchronizing all CPLD signals to the input CPLD clock • ...
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... Table 5-23. Table 5-23. SW500—DDR Clock Ratio/SERDES/Host-Agent Mode Switch Position Configuration Settings 1-3 DDRCLK PLL Ratio 4-5 Host/Agent Configuration 6-8 SERDES Configuration MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-30 Description (ON=0, OFF= 1.5 2 2.5 3.5 1.5 2 ...
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... Serial RapidIO System Size Configuration 5.5 AdvancedMC Backplane Connector The MPC8572EAMC is compatible to the AMC.0 specification. The AMC.0 specification defines the layout/pin-out of the AdvancedMC edge connector that is used to connect to the carrier card. The edge connector is sub-divided into four distinct port regions: • ...
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... AdvancedMC Definition Pin # Name 01 GND 02 + PS1 GA0 06 RSRVD 07 GND 08 RSRVD 09 + GND MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-32 MPC8572EAMC Definition Mating Driven by Driven by — First — — First — — Last — — First — Carrier Second Carrier Module Second — ...
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... RX2+ 33 RX2– 34 GND 35 TX3+ 36 TX3– 37 GND 38 RX3+ 39 RX3– 40 GND 41 ENABLE # MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor MPC8572EAMC Definition Mating Driven by Driven by Module Third Module — First — Carrier Third Carrier — First — Carrier Second — ...
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... RX6+ 63 RX6– 64 GND 65 TX7+ 66 TX7– 67 GND 68 RX7+ 69 RX7– 70 GND 71 SDA_L MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-34 MPC8572EAMC Definition Mating Driven by Driven by — First — — — Module Third Module — First — Carrier Third Carrier — ...
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... GND 163 TX20+ 162 TX20– 161 GND 160 RX20+ 159 RX20– 158 GND MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor MPC8572EAMC Definition Mating Driven by Driven by — First — — — CLKA Driver Third — — ...
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... RX16– 134 GND 133 TX15+ 132 TX15– 131 GND 130 RX15+ 129 RX15– 128 GND MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-36 MPC8572EAMC Definition Mating Driven by Driven by Module Third Carrier Module — First — Carrier Third ...
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... RX11– 104 GND 103 TX10+ 102 TX10– 101 GND 100 RX10+ 99 RX10– 98 GND MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor MPC8572EAMC Definition Mating Driven by Driven by Module Third Carrier Module — First — Carrier Third Carrier Module — ...
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... Reset CPLD. In addition the AdvancedMC has been designed so that in environments where the MMC is not present the Reset CPLD can power up the board non-MMC-enabled mode (switch selectable: SW4.4). The ColdFire supports a UART port and a background debug module (BDM) via the expansion connector. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-38 MPC8572EAMC Definition Mating ...
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... The carrier IPMC releases the module from this state by driving the AMC_ENABLE_N signal high. This is routed through the Reset CPLD to the ColdFire via the signal CF_RESET_N. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor MPC8572EAMC Functional Description ...
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... MMC. This switch signal is pulled up to Management Power so that it can be read when Payload Power is not applied. The MMC sends an event to the Carrier IPMC when the Hot Swap Switch changes state. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-40 Figure 5-21 details the states ...
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... Insert the AdvancedMC into the slot with the handle extracted. The BLUE LED switches ON once it is inserted. 3. Close the handle. The BLUE LED flashes and then switches OFF. The board powers up. MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor MPC8572EAMC Functional Description ...
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... Internal Use Area Starting Offset • Multiple of 8bytes, 00= not present 1 Chassis Use Area starting Offset • Multiple of 8bytes, 00= not present MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-42 Figure 5-22. MMC UART Menu Table 5-27 through Table Table 5-27. FRU Common Header ...
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... FRU File ID Bytes xx Additional Custom mfg info fields 1 C1 type/length/byte encoded to indicate no more fields Y 00—any remaining unused space 1 Board area checksum MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor Common Header Field Value Table 5-28. FRU Board Information Area ...
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... Product Info Area Checksum Table 5-30. FRU Point-to-Point Connectivity Record Length Field 1 Record Type ID (C0) 1 End of List/version 1 Record length 1 Record Checksum MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 5-44 Table 5-29. FRU Product Information Area Common Header Value 467265657363616c65 CA 4D504338353732414D43 ...
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... AMC Link Descriptor 1 Link Designator AMC Link Designator AMC Link Type AMC Link Type Extension Link grouping ID AMC Asymmetric Match MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor MPC8572EAMC Functional Description Common Header Value 57 5A3100 Fixed for PICMG at 5A3100 ...
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... A heat sink is used to cool the MPC8572E device. The heat sink definition is based on thermal simulation within an ATCA chassis with an air flow of >2 m/s. Thermal heat compound is used to ensure the heat sink makes good thermal contact with the microprocessor. Placing the MPC8572EAMC near the fan outlet also helps maximize cooling. ...
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... MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 Freescale Semiconductor Table A-1. Document Revision History Substantive Change(s) 3-1, “MPC8572EAMC Memory Map,” changed 0xE8000000 to 0xF8000000 for 5-4, “MPC8572E Local Bus Chip Select Resources and Memory Map,” changed Section 1.3.1, “External Connectors.” ...
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... Revision History MPC8572EAMC Advanced Mezzanine Card User Guide, Rev. 1.2 A-2 Freescale Semiconductor ...