MPC8347VVAGDB Freescale Semiconductor, MPC8347VVAGDB Datasheet - Page 17

• Manufacturer Part Number: MPC8347VVAGDB
• Description: IC MPU POWERQUICC II 672-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8347VVAGDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 620-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8349E-MITXE
• Maximum Clock Frequency: 400 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• I/o Voltage: 1.8 V, 2.5 V, 3.3 V
• Minimum Operating Temperature: 0 C
• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: TBGA
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 400MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: TBGA
• No. Of Pins: 672
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
At recommended operating conditions with GV
MCK[n] cycle time, (MCK[n]/MCK[n] crossing)
Skew between any MCK to ADDR/CMD
ADDR/CMD output setup with respect to MCK
ADDR/CMD output hold with respect to MCK
MCS(n) output setup with respect to MCK
MCS(n) output hold with respect to MCK
MCK to MDQS
MDQ/MECC/MDM output setup with respect to
MDQS
MDQ/MECC/MDM output hold with respect to
MDQS
MDQS preamble start
Table 14. DDR SDRAM Output AC Timing Specifications for Source Synchronous Mode
MPC8347E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 11
Parameter
333 MHz
266 MHz
200 MHz
333 MHz
266 MHz
200 MHz
333 MHz
266 MHz
200 MHz
333 MHz
266 MHz
200 MHz
333 MHz
266 MHz
200 MHz
333 MHz
266 MHz
200 MHz
333 MHz
266 MHz
200 MHz
333 MHz
266 MHz
200 MHz
DD
of 2.5 V ± 5%.
Symbol
t
t
t
t
t
t
t
t
t
t
t
DDKHMH
DDKHDS,
DDKHDX,
AOSKEW
DDKHMP
DDKHAS
DDKHAX
DDKHCS
DDKHCX
DDKLDS
DDKLDX
t
MCK
1
–0.25 × t
–1000
–1100
–1200
1200
1200
3.45
2.65
3.45
2.65
–0.9
–1.1
–1.2
Min
900
900
900
900
2.8
4.6
2.0
3.8
2.8
4.6
2.0
3.8
6
MCK
– 0.9
–0.25 × t
Max
200
300
400
0.3
0.5
0.6
10
—
—
—
—
—
—
MCK
+ 0.3
Unit
ns
ps
ns
ns
ns
ns
ns
ps
ps
ns
DDR SDRAM
Notes
2
4
4
4
4
5
6
6
3
7
17