MC7447AHX1420LB Freescale Semiconductor, MC7447AHX1420LB Datasheet - Page 16

• Manufacturer Part Number: MC7447AHX1420LB
• Description: IC MPU RISC 1420MHZ 360-FCCBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC7447AHX1420LB

• Processor Type: MPC74xx PowerPC 32-Bit
• Speed: 1.42GHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 360-FCCBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Electrical and Thermal Characteristics
5.2.2
Table 9
Figure
16
At recommended operating conditions. See
Input setup times:
Input hold times:
Output valid times:
Output hold times:
A[0:35], AP[0:4]
SYSCLK to output enable
SYSCLK to output high impedance (all except TS, ARTRY,
SHD0, SHD1)
SYSCLK to TS high impedance after precharge
Maximum delay to ARTRY/SHD0/SHD1 precharge
A[0:35], AP[0:4]
D[0:63], DP[0:7]
AACK, ARTRY, BG, CKSTP_IN, DBG, DTI[0:3], GBL,
BMODE[0:1], BVSEL
A[0:35], AP[0:4]
D[0:63], DP[0:7]
AACK, ARTRY, BG, CKSTP_IN, DBG, DTI[0:3], GBL,
BMODE[0:1], BVSEL
A[0:35], AP[0:4]
D[0:63], DP[0:7]
AACK, BR, CI, CKSTP_IN, DRDY, DTI[0:3], GBL, HIT,
TS
ARTRY, SHD[0:1]
D[0:63], DP[0:7]
AACK, BR, CI, CKSTP_IN, DRDY, DTI[0:3], GBL, HIT,
TS
ARTRY, SHD[0:1]
5.
provides the processor bus AC timing specifications for the MPC7447A as defined in
TT[0:3], QACK, TA, TBEN, TEA, TS, EXT_QUAL,
PMON_IN, SHD[0:1]
TT[0:3], QACK, TA, TBEN, TEA, TS, EXT_QUAL,
PMON_IN, SHD[0:1]
PMON_OUT, QREQ, TBST, TSIZ[0:2], TT[0:3], WT
PMON_OUT, QREQ, TBST, TSIZ[0:2], TT[0:3], WT
Processor Bus AC Specifications
MPC7447A RISC Microprocessor Hardware Specifications, Rev. 5
Parameter
Table 9. Processor Bus AC Timing Specifications
Table
4.
Symbol
t
t
t
t
t
t
KHTSPZ
t
t
t
t
t
t
t
t
KHARX
t
t
KHARP
t
t
t
t
KHTSV
KHARV
KHTSX
t
t
MVKH
DXKH
MXKH
KHOV
KHDX
KHOX
KHOE
KHOZ
AVKH
DVKH
AXKH
KHAV
KHDV
KHAX
IVKH
IXKH
2
All Speed Grades
Min
1.8
1.8
1.8
1.8
0.5
0.5
0.5
0.5
0.5
0.5
—
—
—
—
—
—
—
—
0
0
0
0
Max
1
2.0
2.0
2.0
2.0
2.0
3.5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
1
t
t
Freescale Semiconductor
SYSCLK
SYSCLK
Unit
ns
ns
ns
ns
ns
ns
Figure 4
3, 5, 6, 7
Notes
3, 4, 5
—
—
—
—
—
—
—
8
8
5
5
and