EZ80L92AZ050SC00TR Zilog, EZ80L92AZ050SC00TR Datasheet - Page 188
EZ80L92AZ050SC00TR
Manufacturer Part Number
EZ80L92AZ050SC00TR
Description
IC EZ80 MPU 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80L92AZ020SG.pdf
(231 pages)
Specifications of EZ80L92AZ050SC00TR
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
EZ80L92AZ050SC00T
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PS013014-0107
ZDI Read Memory Register
When a Read is executed from the ZDI Read Memory register, the
data from the memory address currently pointed to by the program counter, PC; the pro-
gram counter is then incremented. In Z80 MEMORY mode, the memory address is
{MBASE, PC[15:0]}. In ADL MEMORY mode, the memory address is PC[23:0]. Refer
to the eZ80
MEMORY modes.
The program counter, PC, increments after each data Read. However, the ZDI register
address does not increment automatically when this register is accessed. As a result, the
ZDI master can read any number of data bytes out of memory through the ZDI Read
Memory register. See
Table 106. ZDI Read Memory Register (ZDI_RD_MEM = 20h in the ZDI
Register Read-Only Address Space)
Bit
Reset
CPU Access
Note: R = Read-only.
Bit
Position
[7:0]
zdi_rd_mem
®
CPU User Manual (UM0077) for more information regarding Z80 and ADL
Table
00h–FFh 8-bit data read from the memory address indicated by
Value
R
7
0
106.
Description
the CPU’s program counter. In Z80 MEMORY mode,
8-bit data is transferred out from address {MBASE,
PC[15:0]}. In ADL Memory mode, 8-bit data is
transferred out from address PC[23:0].
R
6
0
R
5
0
R
4
0
R
3
0
Product Specification
eZ80L92
R
2
0
ZiLOG Debug Interface
eZ80L92 MCU
fetches the
R
1
0
R
0
0
182
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