MC68EC000EI20 Freescale Semiconductor, MC68EC000EI20 Datasheet - Page 351
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MC68EC000EI20
Manufacturer Part Number
MC68EC000EI20
Description
IC MPU 32BIT 20MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Specifications of MC68EC000EI20
Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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FGETMAN
Operation:
Assembler
Syntax:
Attributes:
Description: Converts the source operand to extended precision (if necessary) and
Operation Table:
Floating-Point Status Register:
MOTOROLA
extracts the mantissa. Converts the mantissa to an extended-precision value and
stores the result in the destination floating-point data register. The result is in the range
[1.0...2.0] with the sign of the source mantissa, zero, or a NAN.
Condition Codes:
Quotient Byte:
Exception Byte:
Accrued Exception Byte:
NOTES:
1. If the source operand is a NAN, refer to 1.6.5 Not-A-Numbers for more information.
2. Sets the OPERR bit in the floating-point status register exception byte.
DESTINATION
Result
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
Mantissa of Source
FGETMAN. < fmt > < ea > ,FPn
FGETMAN.X FPm,FPn
FGETMAN.X FPn
Format = (Byte, Word, Long, Single, Double, Extended, Packed)
+
Mantissa
(MC6888X, M68040FPSP)
In Range
Affected as described in 3.6.2 Conditional Testing.
Not affected.
BSUN
SNAN
OPERR
OVFL
UNFL
DZ
INEX2
INEX1
Affected as described in IEEE exception and trap compati-
bility in the appropriate user’s manual.
Get Mantissa
FPn
– +
+ 0.0
Cleared
Refer to 1.6.5 Not-A-Numbers.
Set if the source is
otherwise.
Cleared
Cleared
Cleared
Cleared
If < fmt > is packed, refer to inexact result on
decimal input in the appropriate user’s
manual; cleared otherwise.
SOURCE
Zero
1
– 0.0
– +
Floating Point Instructions
FGETMAN
Infinity
NAN
infinity; cleared
2
–
5-49
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