MC68EC000EI20 Freescale Semiconductor, MC68EC000EI20 Datasheet - Page 468
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MC68EC000EI20
Manufacturer Part Number
MC68EC000EI20
Description
IC MPU 32BIT 20MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Specifications of MC68EC000EI20
Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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Supervisor (Privileged) Instructions
FSAVE
Operation:
Assembler
Syntax:
Attributes:
Description: FSAVE allows the completion of any floating-point operation in progress for
6-14
the MC68040. It saves the internal state of the floating-point unit in a state frame
located at the effective address. After the save operation, the floating-point unit is in the
idle state, waiting for the execution of the next instruction. The first word written to the
state frame is the format word specifying the size of the frame and the revision number
of the floating-point unit.
Any floating-point operations in progress when an FSAVE instruction is encountered
can be completed before the FSAVE executes, saving an IDLE state frame. Execution
of instructions already in the floating-point unit pipeline continues until completion of all
instructions in the pipeline or generation of an exception by one of the instructions. An
IDLE state frame is created by the FSAVE if no exceptions occurred; otherwise, a
BUSY or an UNIMP stack frame is created.
FSAVE suspends the execution of any operation in progress and saves the internal
state in a state frame located at the effective address for the MC68881/MC68882. After
the save operation, the floating-point coprocessor is in the idle state, waiting for the
execution of the next instruction. The first word written to the state frame is the format
word, specifying the size of the frame and the revision number of the floating-point
coprocessor. The microprocessor unit initiates the FSAVE instruction by reading the
floating-point coprocessor save CIR. The floating-point coprocessor save CIR is
encoded with a format word that indicates the appropriate action to be taken by the
main processor. The current implementation of the floating-point coprocessor always
returns one of five responses in the save CIR:
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
If in Supervisor State
ELSE TRAP
FSAVE < ea >
Unsized
Save Internal Floating-Point State
Then FPU Internal State
NOTE: XX is the floating-point coprocessor version
(MC68881, MC68882, MC68040 only)
number.
$XXB4
$XX18
$0018
$0118
$0218
Value
Save NULL state frame
Not ready, come again
Illegal, take format exception
Save IDLE state frame
Save BUSY state frame
Definition
State Frame
FSAVE
MOTOROLA
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